ADM1168 Analog Devices, ADM1168 Datasheet - Page 26

• Manufacturer Part Number: ADM1168
• Description: Super Sequencer and Monitor with Nonvolatile Fault Recording
• Manufacturer: Analog Devices

Specifications of ADM1168

• # Supplies Monitored: 8
• Volt Monitoring Accuracy: 1%
• # Output Drivers: 8
• Fet Drive/enable Output: Both
• Package: 32 ld LQFP

ADM1168
Block Read
In a block read operation, the master device reads a block of data
from a slave device. The start address for a block read must have
been set previously. In the ADM1168, this is done by a send byte
operation to set a RAM address, or a write byte/word operation to
set an EEPROM address. The block read operation itself consists of
a send byte operation that sends a block read command to the
slave, immediately followed by a repeated start and a read operation
that reads out multiple data bytes, as follows:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. The master asserts ACK on SDA.
11. The master receives 32 data bytes.
12. The master asserts ACK on SDA after each data byte.
13. The master asserts a stop condition on SDA to end the
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
write bit (low).
The addressed slave device asserts ACK on SDA.
The master sends a command code that tells the slave
device to expect a block read. The ADM1168 command
code for a block read is 0xFD (1111 1101).
The slave asserts ACK on SDA.
The master asserts a repeat start condition on SDA.
The master sends the 7-bit slave address followed by the
read bit (high).
The slave asserts ACK on SDA.
The ADM1168 sends a byte-count data byte that tells the
master how many data bytes to expect. The ADM1168
always returns 32 data bytes (0x20), which is the maximum
allowed by the SMBus 1.1 specification.
transaction. See Figure 35.
1
S
1
S
ADDRESS
ADDRESS
SLAVE
SLAVE
2
2
Figure 36. Block Read from the EEPROM or RAM with PEC
W A
W A
3
3
Figure 35. Block Read from the EEPROM or RAM
COMMAND 0xFD
COMMAND 0xFD
(BLOCK READ)
(BLOCK READ)
4
4
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A
A
5
5
6
S
6
S
ADDRESS
ADDRESS
SLAVE
SLAVE
7
7
Error Correction
The ADM1168 provides the option of issuing a packet error
checking (PEC) byte after a write to the RAM, a write to the
EEPROM, a block write to the RAM/EEPROM, or a block read
from the RAM/EEPROM. This option enables the user to verify
that the data received by or sent from the ADM1168 is correct.
The PEC byte is an optional byte sent after that last data byte has
been written to or read from the ADM1168. The protocol is the
same as a block read for Step 1 to Step 12 and then proceeds as
follows:
13. The ADM1168 issues a PEC byte to the master. The master
14. A no acknowledge (NACK) is generated after the PEC byte
15. The master asserts a stop condition on SDA to end the
Note that the PEC byte is calculated using CRC-8. The frame
check sequence (FCS) conforms to CRC-8 by the polynomial
See the SMBus 1.1 specification for details.
An example of a block read with the optional PEC byte is shown
in Figure 36.
R A
R A
C(x) = x
checks the PEC byte and issues another block read, if the
PEC byte is incorrect.
to signal the end of the read.
transaction.
8
8
COUNT
COUNT
BYTE
BYTE
9
9
DATA
32
8
10
10
A
A
+ x
A
DATA
DATA
DATA
2
11
32
11
1
1
PEC
+ x
13
12
12
A
A
1
A
14
A
+ 1
13
15
P
P