ADP5023 Analog Devices, ADP5023 Datasheet - Page 17

• Manufacturer Part Number: ADP5023
• Description: Dual 3 MHz, 800 mA Buck Regulator with One 300 mA LDO
• Manufacturer: Analog Devices

Data Sheet
THEORY OF OPERATION
POWER MANAGEMENT UNIT
The
combining two step-down (buck) dc-to-dc converters and one
low dropout linear regulator (LDO). The high switching
frequency and tiny 24-lead LFCSP package allows a small
power management solution.
To combine these high performance regulators into the micro
PMU, there is a system controller allowing them to operate
together.
The buck regulators can operate in forced PWM mode if the
MODE pin is at a logic high level. In forced PWM mode, the
buck switching frequency is always constant and does not
change with the load current. If the MODE pin is at a logic
low level, the switching regulators operate in auto PWM/PSM
mode. In this mode, the regulators operate at fixed PWM
frequency when the load current is above the PSM current
threshold. When the load current falls below the PSM current
threshold, the regulator in question enters PSM, where the
switching occurs in bursts. The burst repetition rate is a
ADP5023
PGND1
AVIN
VIN1
SW1
EN1
EN2
EN3
AND MODE
is a micropower management unit (micro PMU)
CONTROL
ENABLE
ANTISHOOT
THROUGH
I
LOW
CURRENT
LIMIT
DRIVER
PWM
COMP
AND
ENBK1
ENBK2
ENLDO
GM ERROR
CONTROL
VDDA
BUCK1
PWM/
PSM
VIN3
AMP
SOFT START
COMP
ENBK1
UNDERVOLTAGE
PSM
LOCK OUT
LDO
CONTROL
Figure 45. Functional Block Diagram
75Ω
LDO
VOUT1 FB1 FB2 VOUT2
Rev. A | Page 17 of 28
UNDERVOLTAGE
OSCILLATOR
SHUTDOWN
LOCKOUT
THERMAL
SYSTEM
AGND
function of the current load and the output capacitor value.
This operating mode reduces the switching and quiescent
current losses. The auto PWM/PSM mode transition is
controlled independently for each buck regulator. The two
bucks operate synchronized to each other.
The
ling the activation of each regulator. The regulators are activated
by a logic level high applied to the respective EN pin. EN1 controls
BUCK1, EN2 controls BUCK2, and EN3 controls LDO.
Regulator output voltages are set through external resistor
dividers or can be optionally factory programmed to default
values (see the Ordering Guide section).
When a regulator is turned on, the output voltage ramp rate is
controlled though a soft start circuit to avoid a large inrush
current due to the charging of the output capacitors.
Thermal Protection
In the event that the junction temperature rises above 150°C,
the thermal shutdown circuit turns off all the regulators.
Extreme junction temperatures can be the result of high current
R1
R2
75Ω
FB3
ADP5023
VOUT3
SOFT START
ENBK2
PSM
COMP
has individual enable pins (EN1 to EN3) control-
600Ω
CONTROL
GM ERROR
AMP
BUCK2
PWM/
PSM
SEL
OPMODE
ENLDO
Y
ANTISHOOT
THROUGH
B
A
CURRENT
DRIVER
MODE2
AND
COMP
PWM
I
LIMIT
LOW
ADP5023
ADP5023
VIN2
SW2
PGND2
MODE