CS44800-CQZR Cirrus Logic Inc, CS44800-CQZR Datasheet - Page 49
![IC AMP CTLR DGTL 8CH 64-LQFP](/photos/6/80/68092/cs42888-dqz_sml.jpg)
CS44800-CQZR
Manufacturer Part Number
CS44800-CQZR
Description
IC AMP CTLR DGTL 8CH 64-LQFP
Manufacturer
Cirrus Logic Inc
Type
Amplifierr
Datasheet
1.CS44800-CQZR.pdf
(80 pages)
Specifications of CS44800-CQZR
Package / Case
64-LQFP
Applications
Automotive Audio
Mounting Type
Surface Mount
Product
Class-D
Operating Supply Voltage
2.5 V
Supply Current
150 mA
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 10 C
Supply Type
Digital
Supply Voltage (max)
2.62 V
Supply Voltage (min)
2.37 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1532 - BOARD EVAL FOR CS44800 PWM CTRL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Addr
3Ch
3Dh
31h
32h
33h
34h
35h
36h
37h
38h
39h
3Ah
3Bh
PWM Config
page 68
PWM Minimum Pulse
Width
page 69
PWMOUT Delay
page 70
PSR / Power Supply
Config
page 73
PSR_Decimator
Scaled
page 74
PSR_Decimator
Scaled
page 74
PSR_Decimator
Scaled
page 74
Reserved
Reserved
Reserved
PSR_Decimator Outd
page 75
PSR_Decimator Outd
page 75
PSR_Decimator Outd
page 75
Function
default
default
default
default
default
default
default
default
default
default
default
default
default
DEC_SCALED15
DEC_SCALED07
DEC_OUTD23
DEC_OUTD15
DEC_OUTD07
PWMOUTxx-
RESERVED
RESERVED
RESERVED
RESERVED
DIFF_DLY2
DISABLE_
OSRATE
PSR_EN
7
0
0
0
0
0
0
0
0
0
0
0
0
0
DEC_SCALED14
DEC_SCALED06
DEC_OUTD22
DEC_OUTD14
DEC_OUTD06
DEC_SHIFT2
PSR_RESET
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
DIFF_DLY1
6
0
0
0
0
0
1
1
0
0
0
0
0
0
FEEDBACK_ EN
DEC_SCALED13
DEC_SCALED05
DEC_OUTD21
DEC_OUTD13
DEC_OUTD05
DEC_SHIFT1
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
DIFF_DLY0
5
0
0
0
0
1
0
1
0
0
0
0
0
0
A1/B1_OUT_CNFG A2/B2_OUT_CNFG
DEC_SCALED12
DEC_SCALED04
DEC_OUTD20
DEC_OUTD12
DEC_OUTD04
MIN_PULSE4
DEC_SHIFT0
CHNL_DLY4
RESERVED
RESERVED
RESERVED
RESERVED
4
0
0
0
0
0
1
0
0
0
0
0
0
0
DEC_SCALED11
DEC_SCALED03
DEC_OUTD19
DEC_OUTD11
DEC_OUTD03
MIN_PULSE3
CHNL_DLY3
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
3
0
0
0
0
0
1
1
0
0
0
0
0
0
DEC_SCALED18
DEC_SCALED10
DEC_SCALED02
PS_SYNC_DIV2
A3_OUT_CNFG
DEC_OUTD18
DEC_OUTD10
DEC_OUTD02
MIN_PULSE2
CHNL_DLY2
RESERVED
RESERVED
RESERVED
2
0
0
0
0
0
0
0
0
0
0
0
0
0
DEC_SCALED17
DEC_SCALED09
DEC_SCALED01
PS_SYNC_DIV1
B3_OUT_CNFG
DEC_OUTD17
DEC_OUTD09
DEC_OUTD01
MIN_PULSE1
CHNL_DLY1
RESERVED
RESERVED
RESERVED
1
0
0
0
0
1
0
0
0
0
0
0
0
0
DEC_SCALED16
DEC_SCALED08
DEC_SCALED00
PS_SYNC_DIV0
DEC_OUTD16
DEC_OUTD08
DEC_OUTD00
MIN_PULSE0
CHNL_DLY0
OUT_CNFG
RESERVED
RESERVED
RESERVED
A4/B4_
0
0
0
0
0
0
0
0
0
0
0
0
0
0