TDA7439DS STMicroelectronics, TDA7439DS Datasheet
TDA7439DS
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TDA7439DS Summary of contents
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... All functions are programmable via serial bus. Description The TDA7439DS is a volume, tone (bass, mid-range and treble) and balance (left/right) Table 1. Device summary Order codes TDA7439DS 13TR ...
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... I C bus transmission examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.1 No address incrementing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.2 Address incrementing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . bus addresses and data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6.1 Chip address byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6.2 Sub-address byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6.3 Data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7 Chip input/output circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 8 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2/23 Bass, mid-range stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Treble stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 TDA7439DS ...
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... TDA7439DS 1 Block diagram and pin out Figure 1. Block diagram 4 L-IN1 100K 5 L-IN2 100K 6 L-IN3 100K 7 L-IN4 100K 3 R-IN1 100K 2 R-IN2 100K 1 R-IN3 100K 28 R-IN4 100K Figure 2. Pin connections MUXOUTL TREBLE( VOLUME TREBLE 0/30dB I 2dB STEP G VOLUME TREBLE INPUT MULTIPLEXER + GAIN 9 19 ...
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... Electrical characteristics Symbol Supply V Supply voltage S I Supply current S SVR Ripple rejection 4/23 Parameter Parameter Parameter = 1 V RMS (mode = OFF) out = 10 kΩ, generator resistance R L Parameter Test condition TDA7439DS Value 10 -55 to 150 Value 85 Min. Typ Max 7 9 10.2 2 0.01 0.1 106 -47 ...
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... TDA7439DS Table 5. Electrical characteristics (continued) Symbol Input stage R Input resistance IN V Clipping level CL S Input separation IN G Minimum input gain in_min G Maximum input gain in_max G Step resolution step Volume control R Volume control input resistance i C Volume control range range A Max. attenuation ...
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... For bass, mid-range and treble response: the center frequency and the response quality can be set by the external circuitry. 6/23 Parameter Test condition - - Adjacent attenuation steps d = 0.3% All gains = 0 dB kHz flat - - All gains 0 dB RMS RMS 0 1 TDA7439DS Min. Typ Max Unit 0.5 1 1.5 dB -1 100 dB 2.1 2.6 Vrms 2 kΩ Ω ...
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... TDA7439DS Figure 3. Test circuit L-IN1 0.47µF L-IN2 0.47µF L-IN3 0.47µF L-IN4 0.47µF R-IN1 0.47µF R-IN2 0.47µF R-IN3 0.47µF R-IN4 0.47µF 5.6nF MUXOUTL TREBLE( 100K 5 100K 6 G VOLUME TREBLE 100K 7 100K 0/30dB 2 I 2dB STEP ...
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... Both control blocks have a step resolution of 1 dB. This very high resolution allows the implementation of systems free from any noisy acoustical effect. The TDA7439DS audio processor provides 3 bands of tone control (bass, mid-range and treble). 3.1 Tone control 3 ...
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... TDA7439DS Transposing and solving for the external components we get: = ----------------------------------------- - C1 2 π ⋅ ⋅ ----------------------------- - C2 – --------------------------------------------------------------------- - R2 2 π ⋅ ⋅ 3.1.2 Treble stage The treble stage is a high-pass filter whose time constant is fixed by an internal resistor (25 kΩ typically) and an external capacitor connected between treble pins and ground. ...
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... Application suggestions Figure 7. Channel separation vs frequency Figure 9. Mid-range filter response Figure 11. Typical tone response 10/23 Figure 8. Bass filter response Figure 10. Treble filter response TDA7439DS ...
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... TDA7439DS bus interface Data transmission from the microprocessor to the TDA7439DS and vice versa takes place through the 2-wire I Pull-up resistors to the positive supply voltage must be used (there are no internal pull-ups). 4.1 Data validity The data on the SDA line must be stable during the high period of the clock as shown in Figure 12 ...
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... SDA Start 4.6 Interface protocol The interface protocol comprises: " a start condition (S) " a chip-address byte, containing the TDA7439DS address " a sub-address byte including an auto address-increment bit " a sequence of data bytes (N bytes + acknowledge) " a stop condition (P). Figure 15. SDA addressing and data CHIP ADDRESS ...
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... D96AU421 5.2 Address incrementing The TDA7439DS receives a start condition followed by the correct chip address, then a sub address with the for address incrementing; now loop condition with an automatic increase of the sub address up to D[3:0] = 0x7. That is, the data for sub addresses from D[3:0] = 1000 (binary) to 1111 are ignored. ...
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... C bus addresses and data bus addresses and data 6.1 Chip address byte The TDA7439DS chip address is 0x88. 6.2 Sub-address byte The function is selected by the 4-bit sub address as given in not used and bit D4 selects address incrementing ( single data byte (B = 0). Table 7. Function selection: sub-address byte ...
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... TDA7439DS Table 9. Input gain value (sub address 0x1) MSB Table 10. Volume value (sub address 0x2) MSB bus addresses and data LSB Input gain 2-dB steps LSB Volume 1-dB steps - - - - MUTE 15/23 ...
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... I C bus addresses and data Table 11. Bass gain value (sub address 0x3) MSB Table 12. Mid-range gain value (sub address 0x4) MSB 16/ LSB Bass gain 2-dB steps - - - LSB Mid-range gain 2-dB steps - - - TDA7439DS ...
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... TDA7439DS Table 13. Treble gain value (sub address 0x5) MSB Table 14. Speaker attenuation value (sub address 0x6, 0x7) MSB bus addresses and data LSB Treble gain 2-dB steps - - - - LSB Speaker attenuation 1-dB steps 17/23 ...
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... I C bus addresses and data Table 14. Speaker attenuation value (sub address 0x6, 0x7) (continued) MSB 18/ LSB Speaker attenuation 1-dB steps MUTE TDA7439DS ...
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... TDA7439DS 7 Chip input/output circuits Figure 18. Pin 23 V CREF Figure 20. Pins 100K V REF Figure 22. Pins 11 MOUT(L) MOUT(R) Figure 19. Pins 26 20K 20K D96AU430 Figure 21. Pins 8, 9 20µA D96AU425 Figure 23. Pins 10, 17 20µA 25K D96AU431 Chip input/output circuits ROUT LOUT 20µA D96AU434 MIXOUT GND ...
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... Chip input/output circuits Figure 24. Pins 12 BIN(L) BIN(R) Figure 26. Pins 18 TREBLE(L) TREBLE(R) Figure 28. Pin 22 SDA 20/23 Figure 25. Pins 13, 15 20µA 44K BOUT(L) BOUT(R) D96AU428 Figure 27. Pin 21 20µA 50K D96AU433 20µA D96AU423 TDA7439DS V S 20µA 44K D96AU429 20µA SCL D96AU424 ...
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... TDA7439DS 8 Package information mm DIM. MIN. TYP. MAX. A 2.65 a1 0.1 0.3 b 0.35 0.49 b1 0.23 0.32 C 0.5 c1 45° (typ.) D 17.7 18 10.65 e 1.27 e3 16.51 F 7.4 7.6 L 0.4 1.27 8 ° (max.) S inch Outline and mechanical data MIN. TYP. MAX. 0.104 0.004 0.012 0.014 0.019 ...
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... Revision history 9 Revision history Table 15. Document revision history Date Jan-2004 Jun-2004 14-Nov-2007 20-Nov-2007 22/23 Revision 1 Initial release 2 Modified presentation Updated titles to Figure 9 3 Minor updates to presentation 4 Updated Figure 23 and TDA7439DS Changes and Figure 10 Figure 27 ...
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... TDA7439DS Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...