TDA7440D STMicroelectronics, TDA7440D Datasheet - Page 8
![IC PROCESSOR AUDIO DGTL 28-SOIC](/photos/6/56/65690/stmicroelectronics-28-soic_sml.jpg)
TDA7440D
Manufacturer Part Number
TDA7440D
Description
IC PROCESSOR AUDIO DGTL 28-SOIC
Manufacturer
STMicroelectronics
Type
Audio Processorr
Datasheet
1.TDA7440D013TR.pdf
(17 pages)
Specifications of TDA7440D
Applications
Hi-Fi Systems
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TDA7440D
Manufacturer:
ST
Quantity:
5 510
Company:
Part Number:
TDA7440D
Manufacturer:
EXAR
Quantity:
5 510
Part Number:
TDA7440D
Manufacturer:
ST
Quantity:
20 000
Company:
Part Number:
TDA7440D013TR
Manufacturer:
SAMSUNG
Quantity:
600
Part Number:
TDA7440D013TR
Manufacturer:
ST
Quantity:
20 000
TDA7440
5
Interface Protocol
The interface protocol comprises:
ACK = Acknowledge
S = Start
P = Stop
A = Address
B = Auto Increment
5.1 EXAMPLES
5.1.1 No Incremental Bus
The TDA7440D receives a start condition, the correct chip address, a subaddress with the B = 0 (no in-
cremental bus), N-datas (all these data concern the subaddress selected), a stop condition.
5.1.2 Incremental Bus
The TDA7440D receive a start conditions, the correct chip address, a subaddress with the B = 1 (incre-
mental bus): now it is in a loop condition with an autoincrease of the subaddress whereas SUBADDRESS
from "XXX1000" to "XXX1111" of DATA are ignored.
The DATA 1 concern the subaddress sent, and the DATA 2 concerns the subaddress sent plus one sent
in the loop etc, and at the end it receivers the stop condition.
8/17
S
S
S
A start condition (S)
A chip address byte, containing the TDA7440D
A subaddress bytes
A sequence of data (N byte + acknowledge)
A stop condition (P)
MSB
MSB
MSB
SOFTWARE SPECIFICATION
1
1
1
0
0
0
CHIP ADDRESS
CHIP ADDRESS
CHIP ADDRESS
D96AU420
D96AU421
D96AU422
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
LSB
LSB
LSB
0
0
0
ACK
ACK
ACK
MSB
MSB
MSB
X
X
X
X
X
X
SUBADDRESS
SUBADDRESS
SUBADDRESS
X
X
X
B
0
1
D3
D3
D2 D1 D0
D2 D1 D0
DATA
LSB
LSB
LSB
ACK
ACK
ACK
MSB
MSB
MSB
DATA 1 to DATA n
DATA 1 to DATA n
DATA
DATA
DATA
DATA
LSB
LSB
LSB
ACK
ACK
ACK
P
P
P