CS6422-CS Cirrus Logic Inc, CS6422-CS Datasheet - Page 10

• Manufacturer Part Number: CS6422-CS
• Description: IC CODEC SPKRPHONE 2CH 20-SOIC
• Manufacturer: Cirrus Logic Inc
• Type: Audio Processorr

Specifications of CS6422-CS

• Mounting Type: Surface Mount
• Package / Case: 20-SOIC
• Applications: Speakerphones
• Peak Reflow Compatible (260 C): No
• Termination Type: SMD
• Supply Voltage Max: 5.5V
• Leaded Process Compatible: No
• Supply Voltage Min: 4.5V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 598-1199-5

2. OVERVIEW
The CS6422 is a full-duplex speakerphone chip for
use in hands-free communications with telephony
quality audio. Common applications include
speakerphones, inexpensive video-conferencing,
and hands-free cellular phone car kits. The CS6422
requires very few external components and allows
system control through a microcontroller interface.
Hands-free communication through a microphone
and speaker typically results in acoustic feedback
or howling because the loop gain of the system ex-
ceeds unity by the time audio amplitudes are ad-
justed to a reasonable level. The solution to the
howling problem has typically been half-duplex,
where either the transmit or the receive channel is
active, never both at the same time. This prevents
instability, but diminishes the overall communica-
tion quality by clipping words and forcing each
talker to speak in turn.
Full-duplex conversation, where both transmit and
receive channels are active simultaneously, is the
conversation quality we enjoy when using hand-
sets. Full-duplex for hands-free communications is
achieved in the CS6422 using a digital signal pro-
cessing technique called “Echo Cancellation.” The
end result is a more natural conversation than half-
duplex, with no awkward breaks and pauses, allow-
ing both parties to speak simultaneously.
Echo Cancellation reduces overall loop gain and
the acoustic coupling between speaker and micro-
phone. This coupling reduction prevents the annoy-
ing effect of hearing one’s own delayed speech,
which is worsened when there is delay in the sys-
tem, such as vocoder delay in digital cellular
phones.
The CS6422 is a complete system implementation
of a Digital Signal Processor with RAM and pro-
gram ROM, running Echo Cancellation algorithms
developed at Crystal Semiconductor using custom-
er input, integrated with two delta-sigma codecs.
The CS6422 is intended to provide a full-duplex
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speakerphone solution with a minimum of design
effort while displacing existing half-duplex speak-
erphone chips.
3. FUNCTIONAL DESCRIPTION
The CS6422 is divided into four external interface
blocks. The analog interfaces connect the device to
the transmit and receive paths. Control functions
are accessible through the microcontroller inter-
face. Two pins accommodate either a crystal or an
externally applied digital clock signal. Analog and
digital power and ground are provided through four
pins.
3.1
In a speakerphone application, one input of the
CS6422 connects to the signal from the micro-
phone, called the near-end or transmit input, and
one output connects to the speaker. The output that
leads to the speaker is called the near-end or re-
ceive output. Together, the input and output that
connect to the microphone and speaker form the
Acoustic Interface.
The signal received at the near-end input is passed
to the far-end or transmit output after acoustic echo
cancellation. This signal is sent to the telephone
line. The signal from the telephone line is received
at the far-end input, also called the receive input,
and this signal is passed to the receive output after
network echo cancellation. The far-end input and
output form the Network Interface.
The analog interfaces are physically implemented
using delta sigma converters running at an output
word rate of 8 kHz, resulting in a passband from
DC to 4 kHz. Because the inputs are analog to dig-
ital converters (ADCs), anti-aliasing and full-scale
input voltage must be kept in mind. The ADCs ex-
pect a single-pole RC filter with a corner at 8 kHz,
and they are post-compensated internally to pre-
vent any resulting passband droop. The ADCs also
expect a maximum of 0.9 V
puts (which are biased around 2.12 VDC). A signal
Analog Interface
rms
(2.5 V
pp
CS6422
CS6422
) at their in-
DS295F1