STA30613TR STMicroelectronics, STA30613TR Datasheet - Page 15

IC PROCESSOR AUD DGTL DDX 64TQFP

STA30613TR

Manufacturer Part Number
STA30613TR
Description
IC PROCESSOR AUD DGTL DDX 64TQFP
Manufacturer
STMicroelectronics
Series
DDX™r
Type
Audio Processorr
Datasheet

Specifications of STA30613TR

Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Applications
-
Lead Free Status / Rohs Status
Compliant
Other names
497-3945-2

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STA30613TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
3.2.2 High-Pass Filter Bypass
The STA306 features an internal digital high-pass filter for the purpose of AC coupling. The purpose of this filter
is to prevent DC signals from passing through a DDX amplifier. DC signals can cause speaker damage
3.3 Configuration Register D (address 03h)
3.3.1 Binary Output Enable Registers
Each two-channel pair of outputs can be set to output a binary PWM stream. In this mode, output A
of a channel will be considered the positive output and output B is negative inverse. For example, setting C34BO
= 1 sets channels 3&4 to Binary Output (PWM) Mode.
3.3.2 Clock Output Select
The Clock Output Select register selects the frequency of the clock output pin relative to the PLL clock output.
The PLL clock runs at 2048fs for 32, 44.1, and 48kHz, at 1024fs for 88.2kHz and 96 kHz, and at 512fs for
176.4kHz and 192kHz.
3.3.3 Post-Scale Link
For multi-channel applications, the post-scale values can be linked to the value of channel 1 for ease of use and
update the values faster.
BIT
BIT
BIT
6
0
1
2
3
7
NAME
RST
BIT
BIT
4
5
COS(1,0)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
01
10
11
RST
0
BQL
D7
0
RST
RST
0
0
0
0
0
NAME
R/W
R/W
R/W
PSL
CKOUT Frequency
PSL
PLL Output/16
D6
PLL Output/4
PLL Output/8
0
Post-Scale Link :0 – Each Channel uses individual Post-Scale value
NAME
HPB
C12BO
C34BO
C56BO
C78BO
NAME
COS1
RST
D5
0
1
1
1 - Each Channel uses Channel 1 Post-Scale value
High-Pass Filter Bypass Bit. Setting of one bypasses internal AC
coupling digital high-pass filter
Channels 1&2, 3&4, 5&6 Binary Output Mode Enable Bits. A
setting of 0 indicates ordinary DDX tri-state output. A setting
of 1 indicates binary output mode.
COS0
D4
0
NAME
COS0
COS1
DESCRIPTION
C78BO
D3
0
DESCRIPTION
DESCRIPTION
C56BO
D2
0
Clock Output Select
Clock Output Select
DESCRIPTION
C34BO
D1
0
C12BO
STA306
D0
0
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