TDA7462D STMicroelectronics, TDA7462D Datasheet - Page 14

IC PROCESSOR AUDIO DUAL SO-28

TDA7462D

Manufacturer Part Number
TDA7462D
Description
IC PROCESSOR AUDIO DUAL SO-28
Manufacturer
STMicroelectronics
Type
Audio Processorr
Datasheet

Specifications of TDA7462D

Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Applications
-

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TDA7462
I
Interface Protocol
The interface protocol comprises:
- a start condition (S)
- a chip address byte (the LSB bit determines
S = Start
R/W = "0" -> Receive Mode (Chip could be
ACK = Acknowledge
P = Stop
TRANSMITTED DATA (send mode)
SM = Soft mute activated
ST = Stereo
X = Not Used
14/25
2
S 1 0 0 0 1 0 0 R/W ACK I
MSB
C BUS INTERFACE DESCRIPTION
X
MSB
"1" -> Transmission Mode (Data could be
programmed by P)
received by P)
CHIP ADDRESS
X
8 Bit
X
X
LSB
ST
SM
MSB
3
I
2
X
I
1
SUBADDRESS
LSB
I
X
0
8 Bit
A
3
A
2
- a subaddress byte
- a sequence of data (N-bytes + acknowledge)
- a stop condition (P)
- the max. Clock Speed is 500kbits/s
The transmitted data is automatic updated after
each ACK. Transmission can be repeated without
new chipaddress.
Reset Condition
A Power On reset (POR) is invoked if the supply
voltage is below than 3.5V. After that the follow-
ing data is written automatically into the registers
of all subaddresses:
The programming after POR is marked bold-face
/ underlined in the programming tables.
With this programming all the outputs are muted
to V
MSB
read / write transmission)
A
1
1
REF
LSB
A
0
(V
1
OUT
ACK
= V
1
MSB
DD
DATA 1 ... DATA n
/2).
1
DATA
8 Bit
1
1
LSB
1
ACK P
LSB
0

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