LT1720CS8#PBF Linear Technology, LT1720CS8#PBF Datasheet - Page 4
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LT1720CS8#PBF
Manufacturer Part Number
LT1720CS8#PBF
Description
IC COMP R-RINOUT DUAL 8-SOIC
Manufacturer
Linear Technology
Series
UltraFast™r
Type
General Purposer
Datasheet
1.LT1720CS8PBF.pdf
(28 pages)
Specifications of LT1720CS8#PBF
Number Of Elements
2
Output Type
CMOS, Rail-to-Rail, TTL
Voltage - Supply
2.7 V ~ 6 V
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Comparator Type
High Speed
No. Of Comparators
2
Response Time
4.5ns
Ic Output Type
CMOS, TTL
Supply Current
4mA
Supply Voltage Range
2.7V To 6V
Amplifier Case Style
SOIC
No. Of Pins
8
Rohs Compliant
Yes
Output Compatibility
CMOS, TTL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
LT1720/LT1721
ELECTRICAL CHARACTERISTICS
SYMBOL
Δt
t
t
t
t
f
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: If one input is within these common mode limits, the other input
can go outside the common mode limits and the output will be valid.
Note 3: The LT1720/LT1721 comparators include internal hysteresis.
The trip points are the input voltage needed to change the output state in
each direction. The offset voltage is defi ned as the average of V
V
Note 4: The common mode rejection ratio is measured with V
and is defi ned as the change in offset voltage measured from V
to V
Note 5: The power supply rejection ratio is measured with V
is defi ned as the change in offset voltage measured from V
V
TYPICAL PERFORMANCE CHARACTERISTICS
4
range, otherwise specifi cations are at T
SKEW
r
f
JITTER
MAX
TRIP
CC
PD
CM
= 6V, divided by 3.3V.
–1
–2
–3
–
, while the hysteresis voltage is the difference of these two.
3
2
1
0
2.5
= 3.8V, divided by 3.9V.
Input Offset and Trip Voltages
vs Supply Voltage
25°C
V
CM
3.0
= 1V
3.5
SUPPLY VOLTAGE (V)
PARAMETER
Differential Propagation Delay
Propagation Delay Skew
Output Rise Time
Output Fall Time
Output Timing Jitter
Maximum Toggle Frequency
4.0
V
V
4.5
TRIP
V
TRIP
OS
+
–
5.0
5.5
17201 G01
A
6.0
= 25°C. V
–1
–2
–3
CC
CC
3
2
1
0
–50
CM
Input Offset and Trip Voltages
vs Temperature
= 2.7V to
CC
= 5V, V
TRIP
CM
= 1V and
CONDITIONS
(Note 9) Between Channels
(Note 10) Between t
10% to 90%
90% to 10%
V
V
V
V
= 5V
–25
IN
CM
OVERDRIVE
OVERDRIVE
= –0.1V
+
The
= 1.2V
and
= 2V, f = 20MHz
CM
0
TEMPERATURE (°C)
l
= 1V, C
P-P
denotes specifi cations that apply over the full operating temperature
= 50mV, V
= 50mV, V
25
(6dBm), Z
V
V
Note 6: Because of internal hysteresis, there is no small-signal region
in which to measure gain. Proper operation of internal circuity is ensured
by measuring V
Note 7: Propagation delay measurements made with 100mV steps.
Overdrive is measured relative to V
Note 8: t
low values of overdrive. The LT1720/LT1721 are 100% tested with a
100mV step and 20mV overdrive. Correlation tests have shown that
t
performed to guarantee that all internal bias conditions are correct.
Note 9: Differential propagation delay is defi ned as the larger of the two:
where (MAX) and (MIN) denote the maximum and minimum values
of a given measurement across the different comparator channels.
Note 10: Propagation Delay Skew is defi ned as:
TRIP
V
TRIP
PD
OUT
OS
50
Δt
Δt
limits can be guaranteed with this test, if additional DC tests are
PDLH
+
–
CC
CC
PDLH
PDHL
= 10pF , V
IN
75
/t
PD
= 3V
= 5V
PDHL
= 50Ω
t
= t
= t
SKEW
cannot be measured in automatic handling equipment with
100
PDLH(MAX)
PDHL(MAX)
17201 G02
OH
OVERDRIVE
= |t
and V
125
PDLH
t
t
PDLH
PDHL
– t
– t
OL
– t
PDLH(MIN)
PDHL(MIN)
with only 10mV of overdrive.
PDHL
= 20mV, unless otherwise specifi ed.
–0.2
–0.4
4.2
4.0
3.8
3.6
0.2
0
–50
|
Input Common Mode Limits
vs Temperature
TRIP
V
CC
MIN
–25
= 5V
±
.
0
TEMPERATURE (°C)
70.0
62.5
TYP
0.3
0.5
2.5
2.2
15
11
25
50
MAX
1.0
1.5
75
100
17201 G03
UNITS
ps
ps
17201fc
MHz
MHz
RMS
RMS
125
ns
ns
ns
ns