LMV331M5/NOPB National Semiconductor, LMV331M5/NOPB Datasheet - Page 11
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LMV331M5/NOPB
Manufacturer Part Number
LMV331M5/NOPB
Description
IC COMPARATOR TINY LV SOT23-5
Manufacturer
National Semiconductor
Type
General Purposer
Datasheet
1.LMV331M5XNOPB.pdf
(20 pages)
Specifications of LMV331M5/NOPB
Number Of Elements
1
Output Type
CMOS, Open-Collector, TTL
Voltage - Supply
2.7 V ~ 5.5 V
Mounting Type
Surface Mount
Package / Case
SC-74A, SOT-753
Number Of Elements
1
Technology
Bipolar
Input Offset Voltage
7@5VmV
Input Bias Current (typ)
250nA
Single Supply Voltage (typ)
3V
Dual Supply Voltage (typ)
Not RequiredV
Supply Current (max)
0.12@5VmA
Voltage Gain In Db
93.98dB
Power Supply Requirement
Single
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
5
Package Type
SOT-23
Comparator Type
General Purpose
No. Of Comparators
1
Response Time
200ns
Ic Output Type
CMOS, MOS, Open-Collector / Drain, TTL
Supply Current
60µA
Supply Voltage Range
2.7V To 5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LMV331M5
LMV331M5TR
LMV331M5TR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LMV331M5/NOPB
Manufacturer:
NS/国半
Quantity:
20 000
NEGATIVE PEAK DETECTOR
For the negative detector, the output transistor of the com-
parator acts as a low impedance current sink. The only dis-
charge path will be the 1 MΩ resistor and any load impedance
used. Decay time is changed by varying the 1 MΩ resistor
DRIVING CMOS AND TTL
The comparator's output is capable of driving CMOS and TTL
Logic circuits.
FIGURE 9. Negative Peak Detector
FIGURE 8. Positive Peak Detector
FIGURE 10. Driving CMOS
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11
AND GATES
The comparator can be used as three input AND gate. The
operation of the gate is as follow:
The resistor divider at the inverting input establishes a refer-
ence voltage at that node. The non-inverting input is the sum
of the voltages at the inputs divided by the voltage dividers.
The output will go high only when all three inputs are high,
casing the voltage at the non-inverting input to go above that
at inverting input. The circuit values shown work for a "0"
equal to ground and a "1" equal to 5V.
The resistor values can be altered if different logic levels are
desired. If more inputs are required, diodes are recommend-
ed to improve the voltage margin when all but one of the
inputs are high.
OR GATES
A three input OR gate is achieved from the basic AND gate
simply by increasing the resistor value connected from the
inverting input to V
A logic "1" at any of the inputs will produce a logic "1" at the
output.
FIGURE 11. Driving TTL
FIGURE 12. AND Gate
cc
, thereby reducing the reference voltage.
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