LT1394CS8#TRPBF Linear Technology, LT1394CS8#TRPBF Datasheet - Page 12

• Manufacturer Part Number: LT1394CS8#TRPBF
• Description: IC COMPARATOR LOW PWR 7NS 8-SOIC
• Manufacturer: Linear Technology
• Series: UltraFast™r
• Type: General Purposer

Specifications of LT1394CS8#TRPBF

• Number Of Elements: 1
• Output Type: CMOS, Complementary, TTL
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LT1394
APPLICATIONS
delay programming voltage. The fast switching and ramp
linearity permits 1ns accuracy and 100ps repeatability.
Figure 13, a high speed expansion of the current source
turn-on, details the clean switching. Q4 goes off within 2ns
of the trigger input (Trace A) dropping low, enabling the
current source (Q2’s emitter is Trace C). Concurrently, the
1000pF capacitor’s ramp (Trace B) begins. The LT1394’s
output (Trace D) drops low about 7ns later, returning high
after crossing (in this case) a relatively low programming
voltage. Figure 14 juxtaposes the waveforms differently,
permitting enhanced study of circuit timing. Switching
begins with the input trigger falling low (Trace A). The ramp
(Trace C) begins 3ns after the current source turns on (Q2
emitter is Trace D). The output pulse (Trace B) begins
about 4ns later.
To calibrate this circuit apply a trigger input and 3V to the
programming input. Adjust the 100
width at the LT1394’s output.
12
0.1 F
PNP = 2N5087
NPN = 2N2369
220
Figure 11. Fast, Precise, Voltage-Controlled Delay.
Emitter Switched Current Source Has Clean,
Predictable Dynamics
Q1
5V
LT1634
1000pF
U
Q2
100
100
(DELAY
CALIB)
Q4
Q3
INFORMATION
U
0V TO 3V = 0 TO 300ns DELAY
DELAY PROGRAMMING
200ns MINIMUM
330
330
TRIGGER INPUT
51pF
VOLTAGE INPUT
W
1k
trim for a 300ns
–
+
LT1394
0.1 F
U
Q OUTPUT
Q OUTPUT
1394 F11
B = 0.1V/DIV
C = 0.1V/DIV
Figure 12. Voltage-Controlled Delay’s Waveforms.
Programming Voltage Determines Delay Between Input
(Trace A) Falling Edge and Output (Trace D) Rising Edge.
High Linearity Timing Ramp (Trace B) Permits 1ns
Accuracy and 100ps Repeatability
Figure 13. High Speed Expansion of Figure 12. Ramp
(Trace B) Begins When Trigger (Trace A) Falls and
Current Source Turns On (Trace C). Trace D is Output
Figure 14. Delay’s Output Switching Begins with
Trigger Falling Low (Trace A). Ramp (Trace C) Starts
3ns After Current Source Turn-On (Trace D). Output
(Trace B) Begins 4ns Later
A = 5V/DIV
B = 2V/DIV
C = 5V/DIV
D = 5V/DIV
A = 1V/DIV
B = 1V/DIV
A = 2V/DIV
C = 2V/DIV
D = 2V/DIV
D = 1V/DIV
10ns/DIV
100ns/DIV
10ns/DIV
1394 F13
1394 F14
1394 F12