STM32L151CB STMicroelectronics, STM32L151CB Datasheet - Page 17
![no-image](/images/manufacturer_photos/0/6/637/stmicroelectronics_sml.jpg)
STM32L151CB
Manufacturer Part Number
STM32L151CB
Description
Ultra-low-power ARM Cortex-M3 MCU with 128 Kbytes Flash, 32 MHz CPU, LCD, USB
Manufacturer
STMicroelectronics
Datasheet
1.STM32L152VB.pdf
(109 pages)
Specifications of STM32L151CB
Operating Power Supply Range
1.65 V to 3.6 V (without BOR) or 1.8 V to 3.6 V (with BOR option)
Temperature Range
–40 to 85 °C
4 Modes
Sleep, Low-power run (9 μA at 32 kHz), Low-power sleep (4.4 μA),Stop with RTC (1.45 μA), Stop (570 nA), Standby (300 nA)
Ultralow Leakage Per I/o
50 nA
Fast Wakeup From Stop
8 μs
Core
ARM 32-bit Cortex™-M3 CPU
Dma
7-channel DMA controller, supporting timers, ADC, SPIs, I2Cs and USARTs
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32L151CBT6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
STM32L151CBT6
Manufacturer:
ST
Quantity:
20 000
Company:
Part Number:
STM32L151CBT6A
Manufacturer:
MURATA
Quantity:
1 000
Part Number:
STM32L151CBT6A
Manufacturer:
ST
Quantity:
20 000
Company:
Part Number:
STM32L151CBT6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
Company:
Part Number:
STM32L151CBU6
Manufacturer:
RENESAS
Quantity:
11 500
Part Number:
STM32L151CBU6
Manufacturer:
ST
Quantity:
20 000
STM32L151xx, STM32L152xx
●
●
Several prescalers allow the configuration of the AHB frequency, the high-speed APB
(APB2) and the low-speed APB (APB1) domains. The maximum frequency of the AHB and
the APB domains is 32 MHz. See
Figure 2.
2. For the USB function to be available, both HSE and PLL must be enabled, with the CPU running at either
24 MHz or 32 MHz.
Clock security system (CSS): this feature can be enabled by software. If a HSE clock
failure occurs, the master clock is automatically switched to HSI and a software
interrupt is generated if enabled.
Clock-out capability (MCO: microcontroller clock output): it outputs one of the
internal clocks for external use by the application.
Clock tree
Doc ID 17659 Rev 6
Figure 2
for details on the clock tree.
Functional overview
17/109