STM32F100VC STMicroelectronics, STM32F100VC Datasheet - Page 78

• Manufacturer Part Number: STM32F100VC
• Description: Mainstream value line, ARM Cortex-M3 MCU with 256 Kbytes Flash, 24 MHz CPU, motor control and CEC functions
• Manufacturer: STMicroelectronics

Specifications of STM32F100VC

• Peripherals Supported: timers, ADC, SPIs, I2Cs, USARTs and DACs
• Conversion Range: 0 to 3.6 V
• One 16-bit, 6-channel Advanced-control Timer: up to 6 channels for PWM output, dead time generation and emergency stop
• Systick Timer: 24-bit downcounter

Electrical characteristics
78/97
SPI interface characteristics
Unless otherwise specified, the parameters given in
from tests performed under the ambient temperature, f
voltage conditions summarized in
Refer to
input/output alternate function characteristics (NSS, SCK, MOSI, MISO).
Table 50.
1. Preliminary values.
2. Min time is for the minimum time to drive the output and the max time is for the maximum time to validate
3. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put
DuCy(SCK)
t
t
t
t
dis(SO)
t
w(SCKH)
t
w(SCKL)
su(NSS)
t
a(SO)
Symbol
1/t
t
t
t
t
t
t
h(NSS)
su(MI)
v(SO)
t
v(MO)
h(MO)
the data.
the data in Hi-Z
su(SI)
h(MI)
h(SO)
t
t
h(SI)
r(SCK)
f(SCK)
f
SCK
c(SCK)
(1)(2)
(1)
(1)(3)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Section 5.3.13: I/O current injection characteristics
(1)
(1)
(1)
SPI characteristics
SPI clock frequency
SPI clock rise and fall
time
SPI slave input clock
duty cycle
NSS setup time
NSS hold time
SCK high and low time
Data input setup time
Data input hold time
Data output access time Slave mode, f
Data output disable time Slave mode
Data output valid time
Data output valid time
Data output hold time
Parameter
Doc ID 15081 Rev 5
Table
Master mode
Slave mode
Capacitive load: C = 30 pF
Slave mode
Slave mode
Slave mode
Master mode, f
presc = 4
Master mode
Slave mode
Master mode
Slave mode
Slave mode (after enable edge)
Master mode (after enable
edge)
Slave mode (after enable edge)
Master mode (after enable
edge)
9.
STM32F100xC, STM32F100xD, STM32F100xE
Conditions
PCLK
PCLK
Table 50
= 24 MHz
PCLKx
= 24 MHz,
for more details on the
frequency and V
are preliminary values derived
4t
2t
Min
PCLK
PCLK
30
15
50
5
5
5
4
2
2
0
3t
DD
Max
PCLK
12
10
25
70
60
12
5
8
supply
MHz
Unit
ns
ns
%