STM8L101K3 STMicroelectronics, STM8L101K3 Datasheet - Page 7

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STM8L101K3

Manufacturer Part Number
STM8L101K3
Description
Ultra Low Power MCUs, STM8L
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM8L101K3

Low Power Consumption (halt
0.3 μA, Active-halt
Temp. Range
-40 to 85 °C and 125 °C
Three Low Power Modes
Wait, Active-halt, Halt

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STM8L101xx
1
2
Introduction
This datasheet provides the STM8L101xx pinout, ordering information, mechanical and
electrical device characteristics.
For complete information on the STM8L101xx microcontroller memory, registers and
peripherals, please refer to the STM8L reference manual.
The STM8L101xx devices are members of the STM8L low power 8-bit family. They are
referred to as low-density devices in the STM8L101xx microcontroller family reference
manual (RM0013) and in the STM8L Flash programming manual (PM0054).
All devices of the SM8L product line provide the following benefits:
Description
The STM8L101xx low power family features the enhanced STM8 CPU core providing
increased processing power (up to 16 MIPS at 16 MHz) while maintaining the advantages of
a CISC architecture with improved code density, a 24-bit linear addressing space and an
optimized architecture for low power operations.
The family includes an integrated debug module with a hardware interface (SWIM) which
allows non-intrusive in-application debugging and ultrafast Flash programming.
All STM8L101xx microcontrollers feature low power low-voltage single-supply program
Flash memory. The 8-Kbyte devices embed data EEPROM.
The STM8L101xx low power family is based on a generic set of state-of-the-art peripherals.
The modular design of the peripheral set allows the same peripherals to be found in different
ST microcontroller families including 32-bit families. This makes any transition to a different
Reduced system cost
Low power consumption and advanced features
Short development cycles
Product longevity
Up to 8 Kbytes of low-density embedded Flash program memory including up to
2 Kbytes of data EEPROM
High system integration level with internal clock oscillators and watchdogs.
Smaller battery and cheaper power supplies.
Up to 16 MIPS at 16 MHz CPU clock frequency
Less than 150 µA/MH, 0.8 µA in Active-halt mode, and 0.3 µA in Halt mode
Clock gated system and optimized power management
Application scalability across a common family product architecture with
compatible pinout, memory map and modular peripherals.
Full documentation and a wide choice of development tools
Advanced core and peripherals made in a state-of-the art technology
Product family operating from 1.65 V to 3.6 V supply
Doc ID 15275 Rev 11
Introduction
7/81

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