STM8L151K3 STMicroelectronics, STM8L151K3 Datasheet - Page 91
STM8L151K3
Manufacturer Part Number
STM8L151K3
Description
STM8L-Ultra Low Power-8 bits Microcontrollers
Manufacturer
STMicroelectronics
Datasheet
1.STM8L151G2.pdf
(111 pages)
Specifications of STM8L151K3
Operating Power Supply
1.65 to 3.6 V (without BOR), 1.8 to 3.6 V (with BOR)
Temperature Range
-40 to 85 or 125 °C
5 Low Power Modes
Wait, Low power run, Low power wait, Active-halt with RTC, Halt
Ultralow Leakage Per I/0
50 nA
Fast Wakeup From Halt
5 μs
Max Freq
16 MHz, 16 CISC MIPS peak
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STM8L151x2, STM8L151x3
Figure 37. ADC1 accuracy characteristics
Figure 38. Typical connection diagram using the ADC1
1. Refer to
2. C
General PCB design guidelines
Power supply decoupling should be performed as shown in
depending on whether V
capacitors should be used. They should be placed as close as possible to the chip.
4095
4094
4093
pad capacitance (roughly 7 pF). A high C
this, f
7
6
5
4
3
2
1
parasitic
0
V
SSA
[1LSB
ADC1
1
Table 45
represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the
E
IDEAL
O
should be reduced.
2
=
V
4096
3
for the values of R
REF+
4
(or
REF+
V
5
1 LSB
4096
DDA
E
6
T
depending on package)]
IDEAL
Doc ID 018780 Rev 3
is connected to V
E
AIN
7
L
(2)
and C
parasitic
E
D
ADC1
4093 4094 4095 4096
(3)
value will downgrade conversion accuracy. To remedy
.
(1)
DDA
E
G
or not. Good quality ceramic 10 nF
V
DDA
(1) Example of an actual transfer curve
(2) The ideal transfer curve
(3) End point correlation line
E
between the actual and the ideal transfer curves.
E
transition and the first ideal one.
E
transition and the last actual one.
E
between actual steps and the ideal one.
E
between any actual transition and the end point
correlation line.
T
O
G
D
L
=Total Unadjusted Error: maximum deviation
=Integral Linearity Error: maximum deviation
=Differential Linearity Error: maximum deviation
=Offset Error: deviation between the first actual
=Gain Error: deviation between the last ideal
Figure 39
Electrical parameters
or
Figure
40,
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