ST72321BJ6 STMicroelectronics, ST72321BJ6 Datasheet - Page 86
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ST72321BJ6
Manufacturer Part Number
ST72321BJ6
Description
8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC, FIVE TIMERS, SPI, SCI, I2C INTERFACE
Manufacturer
STMicroelectronics
Datasheet
1.ST72321BJ6.pdf
(187 pages)
Specifications of ST72321BJ6
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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ST72321BRx, ST72321BARx ST72321BJx, ST72321BKx
16-BIT TIMER (Cont’d)
OUTPUT
(OC2HR)
Read/Write
Reset Value: 1000 0000 (80h)
This is an 8-bit register that contains the high part
of the value to be compared to the CHR register.
OUTPUT
(OC2LR)
Read/Write
Reset Value: 0000 0000 (00h)
This is an 8-bit register that contains the low part of
the value to be compared to the CLR register.
COUNTER HIGH REGISTER (CHR)
Read Only
Reset Value: 1111 1111 (FFh)
This is an 8-bit register that contains the high part
of the counter value.
COUNTER LOW REGISTER (CLR)
Read Only
Reset Value: 1111 1100 (FCh)
This is an 8-bit register that contains the low part of
the counter value. A write to this register resets the
counter. An access to this register after accessing
the CSR register clears the TOF bit.
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MSB
MSB
MSB
MSB
7
7
7
7
COMPARE
COMPARE
2
2
HIGH
LOW
REGISTER
REGISTER
LSB
LSB
LSB
LSB
0
0
0
0
ALTERNATE
(ACHR)
Read Only
Reset Value: 1111 1111 (FFh)
This is an 8-bit register that contains the high part
of the counter value.
ALTERNATE
(ACLR)
Read Only
Reset Value: 1111 1100 (FCh)
This is an 8-bit register that contains the low part of
the counter value. A write to this register resets the
counter. An access to this register after an access
to CSR register does not clear the TOF bit in the
CSR register.
INPUT CAPTURE 2 HIGH REGISTER (IC2HR)
Read Only
Reset Value: Undefined
This is an 8-bit read only register that contains the
high part of the counter value (transferred by the
Input Capture 2 event).
INPUT CAPTURE 2 LOW REGISTER (IC2LR)
Read Only
Reset Value: Undefined
This is an 8-bit read only register that contains the
low part of the counter value (transferred by the In-
put Capture 2 event).
MSB
MSB
MSB
MSB
7
7
7
7
COUNTER
COUNTER
HIGH
LOW
REGISTER
REGISTER
LSB
LSB
LSB
LSB
0
0
0
0
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