STR755FV2 STMicroelectronics, STR755FV2 Datasheet - Page 54
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STR755FV2
Manufacturer Part Number
STR755FV2
Description
ARM7TDMI-S™ 32-BIT MCU with Flash, SMI, 3 std 16-bit timers, PWM timer, fast 10-bit ADC, I2C, UART, SSP, USB and CAN
Manufacturer
STMicroelectronics
Datasheet
1.STR755FV2.pdf
(84 pages)
Specifications of STR755FV2
Smart Low Power Modes
SLOW, WFI, STOP and STANDBY with backup registers
Conversion Time
min. 3.75 μs
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Electrical parameters
6.3.8
54/84
I/O port pin characteristics
General characteristics
Subject to general operating conditions for V
Table 32.
1. Hysteresis voltage between Schmitt trigger switching levels.
2. When the current limitation is not possible, the V
3. Leakage could be higher than max. if negative current is injected on adjacent pins.
4. Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of
5. The R
6. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured
Symbol
ΣI
I
INJ(PIN)
t
w(IT)in
INJ(PIN
V
R
R
refer to I
induced by V
the I/O for example or an external pull-up or pull-down resistor (see
simulation and/or technology characteristics, not tested in production.
as an external interrupt source.
V
C
V
I
(2)
I
lkg
hys
PU
PD
S
IH
IO
IL
PU
INJ(PIN)
pull-up and R
Input low level voltage
Input high level voltage
Schmitt trigger voltage
hysteresis
Injected Current on any I/O pin
Total injected current (sum of all
I/O and control pins)
Input leakage current on robust
pins
Input leakage current
Static current consumption
Weak pull-up equivalent
resistor
Weak pull-down equivalent
resistor
I/O pin capacitance
External interrupt/wake-up lines
pulse time
General characteristics
IN
<V
specification. A positive injection is induced by V
SS
(5)
(5)
. Refer to
(1)
(6)
Parameter
PD
pull-down equivalent resistor are based on a resistive transistor.
Section 6.2 on page 32
(3)
I/O static characteristics
(4)
STR750Fxx STR751Fxx STR752Fxx STR755Fxx
IN
TTL ports
See
V
Floating input mode
V
V
SS
IN
IN
absolute maximum rating must be respected, otherwise
DD_IO
=
=
≤
V
V
Section 6.3.12 on page 72
V
for more details.
SS
DD_IO
IN
Conditions
≤
V
and T
DD_IO
V
V
V
V
IN
DD_IO
DD_IO
DD_IO
DD_IO
A
>V
Figure
unless otherwise specified.
DD_IO
=3.3 V
=5 V
=3.3 V
=5 V
25). Data based on design
while a negative injection is
Min
50
20
25
20
2
2
Typ
400
200
95
58
80
50
5
Max Unit
± 25
200
150
180
120
0.8
± 4
±1
T
mV
mA
μA
kΩ
kΩ
kΩ
kΩ
pF
V
AP
B