ST72321R6 STMicroelectronics, ST72321R6 Datasheet - Page 136

• Manufacturer Part Number: ST72321R6
• Description: 8-BIT MCU WITH NESTED INTERRUPTS, FLASH,10-BIT ADC, FIVE TIMERS, SPI, SCI, I2C INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST72321R6

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator, clock security system and bypass for external clock
• Four Power Saving Modes: Halt, Active-Halt,Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
• 8-bit Pwm Auto-reload Timer With: 2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector

ST72321Rx ST72321ARx ST72321Jx
INSTRUCTION SET OVERVIEW (Cont’d)
136/193
Mnemo
ADC
ADD
AND
BCP
BRES
BSET
BTJF
BTJT
CALL
CALLR
CLR
CP
CPL
DEC
HALT
IRET
INC
JP
JRA
JRT
JRF
JRIH
JRIL
JRH
JRNH
JRM
JRNM
JRMI
JRPL
JREQ
JRNE
JRC
JRNC
JRULT
JRUGE
JRUGT
Add with Carry
Addition
Logical And
Bit compare A, Memory
Bit Reset
Bit Set
Jump if bit is false (0)
Jump if bit is true (1)
Call subroutine
Call subroutine relative
Clear
Arithmetic Compare
One Complement
Decrement
Halt
Interrupt routine return
Increment
Absolute Jump
Jump relative always
Jump relative
Never jump
Jump if ext. INT pin = 1
Jump if ext. INT pin = 0
Jump if H = 1
Jump if H = 0
Jump if I1:0 = 11
Jump if I1:0 <> 11
Jump if N = 1 (minus)
Jump if N = 0 (plus)
Jump if Z = 1 (equal)
Jump if Z = 0 (not equal)
Jump if C = 1
Jump if C = 0
Jump if C = 1
Jump if C = 0
Jump if (C + Z = 0)
Description
tst (A . M)
Z = 0 ?
A = A + M + C
A = A + M
A = A . M
bres Byte, #3
bset Byte, #3
btjf Byte, #3, Jmp1
btjt Byte, #3, Jmp1
tst(Reg - M)
A = FFH-A
dec Y
Pop CC, A, X, PC
inc X
jp [TBL.w]
jrf *
(ext. INT pin high)
(ext. INT pin low)
H = 1 ?
H = 0 ?
I1:0 = 11 ?
I1:0 <> 11 ?
N = 1 ?
N = 0 ?
Z = 1 ?
C = 1 ?
C = 0 ?
Unsigned <
Jmp if unsigned >=
Unsigned >
Function/Example
A
A
A
A
M
M
M
M
reg, M
reg
reg, M
reg, M
reg, M
Dst
M
M
M
M
M
Src
I1
I1
1
H
H
H
H
I0
I0
0
N
N
N
N
N
N
N
N
N
N
0
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
1
C
C
C
C
C
C
C
1