STM706P STMicroelectronics, STM706P Datasheet - Page 11

• Manufacturer Part Number: STM706P
• Description: 3V Supervisor
• Manufacturer: STMicroelectronics

Specifications of STM706P

• Stm706/708 T: 3.00 V ≤ VRST≤ 3.15 V S
• Operating Temperature: –40 °C to 85 °C (industrial grade)

STM706T/S/R, STM706P, STM708T/S/R
3
3.1
3.2
3.3
3.4
Operation
Reset output
The STM70x supervisor asserts a reset signal to the MCU whenever V
reset threshold (V
push-button reset input (MR) is taken low. RST is guaranteed to be a logic low (logic high for
STM706P and STM708T/S/R) for V
During power-up, once V
the reset timeout period, t
If V
low for at least the reset timeout period (t
the internal timer clears. The reset timer starts when V
Push-button reset input
A logic low on MR asserts reset. Reset remains asserted while MR is low, and for t
Figure
it to be left open if not used. This input can be driven with TTL/CMOS-logic levels or with
open-drain / collector outputs. Connect a normally open momentary switch from MR to GND
to create a manual reset function; external debounce circuitry is not required. If MR is driven
from long cables or the device is used in a noisy environment, connect a 0.1 µF capacitor
from MR to GND to provide additional noise immunity. MR may float, or be tied to V
not used.
Watchdog input (STM706T/S/R and STM706P)
The watchdog timer can be used to detect an out-of-control MCU. If the MCU does not
toggle the watchdog input (WDI) within t
asserted. The internal 1.6s timer is cleared by either:
1.
2.
See
The timer remains cleared and does not count for as long as reset is asserted. As soon as
reset is released, the timer starts counting.
Watchdog output (STM706T/S/R and STM706P)
When V
not yet timed out. However, unlike the reset output, WDO goes high as soon as V
exceeds the reset threshold. WDO may be used to generate a reset pulse by connecting it
to the MR input.
CC
Figure 28
a reset pulse, or
by toggling WDI (high-to-low or low-to-high), which can detect pulses as short as 50 ns.
drops below the reset threshold, RST goes low. Each time RST is asserted, it stays
27) after it returns high. The MR input has an internal 40 k pull-up resistor, allowing
CC
drops below the reset threshold, WDO will go low even if the watchdog timer has
for STM706T/S/R and STM706P.
RST
), a watchdog timeout occurs (if WDO is connected to MR), or when the
CC
rec
exceeds the reset threshold an internal timer keeps RST low for
. After this interval RST returns high.
Doc ID 10518 Rev 11
CC
< V
WD
rec
RST
). Any time V
(1.6 s), the watchdog output pin (WDO) is
down to V
CC
CC
CC
returns above the reset threshold.
=1 V for T
goes below the reset threshold
A
CC
= 0 °C to 85 °C.
goes below the
Operation
CC
CC
rec
when
(see
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