DS1643 Maxim, DS1643 Datasheet - Page 12
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DS1643
Manufacturer Part Number
DS1643
Description
The DS1643 is an 8K x 8 nonvolatile static RAM with a full function Real Time Clock (RTC) that are both accessible in a byte-wide format
Manufacturer
Maxim
Datasheet
1.DS1643.pdf
(17 pages)
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AC TEST CONDITIONS
Output Load: 100pF + 1TTL Gate
Input Pulse Levels: 0 to 3.0V
Timing Measurement Reference Levels:
Input Pulse Rise and Fall Times: 5ns
NOTES:
1) Voltages are referenced to ground.
2) Typical values are at +25C and nominal supplies.
3) Outputs are open.
4) The CE2 control signal functions exactly the same as the
5) Data retention time is at 25C.
6) Each DS1643 has a built-in switch that disconnects the lithium source until V
7) Real-Time Clock Modules (DIP) can be successfully processed through conventional wave-soldering
PACKAGE INFORMATION
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a
different suffix character, but the drawing pertains to the package regardless of RoHS status.
active and inactive levels are opposite.
user. The expected t
from the time power is first applied by the user.
techniques as long as temperature exposure to the lithium energy source contained within does not
exceed +85C. Post-solder cleaning with water washing techniques is acceptable, provided that
ultrasonic vibration is not used.
In addition, for the PowerCap:
PACKAGE TYPE
Input: 1.5V
Output: 1.5V
a. Dallas Semiconductor recommends that PowerCap Module bases experience one pass through
b. Hand soldering and touch-up: Do not touch or apply the soldering iron to leads for more than
34 PowerCap
solder reflow oriented with the label side up (“live-bug”).
3 seconds. To solder, apply flux to the pad, heat the lead frame pad and apply solder. To
remove the part, apply flux, heat the lead frame pad until the solder reflow and use a solder
wick to remove solder.
28 EDIP
DR
is defined for DIP modules as a cumulative time in the absence of V
PACKAGE CODE
MDF28+2
PC1+2
12 of 17
CE
signal except that the logic levels for
DOCUMENT NO.
CC
21-0245
21-0246
is first applied by the
DS1643/DS1643P
CC
starting