DS17285 Maxim, DS17285 Datasheet
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DS17285
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DS17285 Summary of contents
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... The DS17285, DS17485, DS17885, DS17287, DS17487, and DS17887 real-time clocks (RTCs) are designed to be successors to the industry-standard DS12885 and DS12887. The DS17285, DS17485, and DS17885 (here- after referred to as the DS17x85) provide a real-time clock/calendar, one time-of-day alarm, three maskable interrupts with a common interrupt output, a programma- ble square wave, and 114 bytes of battery-backed NV SRAM ...
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... PDIP, SO, TSOP.............................................-55°C to +125°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...
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DC ELECTRICAL CHARACTERISTICS ( 3.0V Over the operating range, unless otherwise noted.) (Note 1) CC BAT A PARAMETER SYMBOL Current (Oscillator BAT BAUX On +25° 3.0V A ...
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Real-Time Clocks AC ELECTRICAL CHARACTERISTICS (V = +2.7V to +3.7V Over the operating range, unless otherwise noted.) (Note PARAMETER SYMBOL Cycle Time Pulse Width Low PW Pulse Width High ...
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ALE PW ASH t ASD RD PW RWH t ASD ASL AD0–AD7 IRQ PF(MAX) V PF(MIN RECOGNIZED CS, WR, RD VALID AD0–AD7 _____________________________________________________________________ Real-Time Clocks t CYC t ASED PW RWL t ...
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Real-Time Clocks POWER-UP/POWER-DOWN CHARACTERISTICS (T = -40°C to +85°C) (Note 2) A PARAMETER SYMBOL Recovery at Power-Up V Fall Time PF(MAX) V PF(MIN) V Fall Time PF(MAX) V PF(MIN) DATA RETENTION (DS17x87 ONLY) (T ...
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T = +25°C, unless otherwise noted SUPPLY CURRENT vs. INPUT VOLTAGE 400 350 300 250 200 2.5 2.8 3.0 3.3 3.5 V (V) BAT PIN NAME 24 28 Active-Low Power-On Reset. ...
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... V is absent. Diodes placed in series between not required, the pin must be grounded. UL recognized BAT and . Bus cycles pin, as might be generated BAUX level is in the high-impedance bus, provided that they are . CC and the battery can BAT (www.maxim- ...
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... Diodes placed in series between V BAUX BAUX reverse charging current when used with a lithium battery (www.maxim-ic.com/qa/info/ul/). For BAUX and the auxiliary-battery-enable bit bank 1, register 4BH, should = 0. Square-Wave Output. When V condition enables a 32kHz square-wave output. A square wave is output if either SQWE = 1 or E32k = 1 ...
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Real-Time Clocks X1 OSCILLATOR X2 DS17x87 ONLY V BAT GND POWER CONTROL BAUX CS BUS WR INTERFACE RD ALE AD0–AD7 DS17x85/87 Figure 1. Functional Diagram 10 ____________________________________________________________________ DIVIDE DIVIDE BY DIVIDE 16:1 MUX ...
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... RAM. The device also provides additional extended RAM in either 2k/4k/8kbytes (DS17285/DS17485/DS17885). A time- of-day alarm, six maskable interrupts with a common interrupt output, and a programmable square-wave output are available. It also operates in either 24-hour or 12-hour format with an AM/PM indicator ...
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... The RTC function continues to operate, and all the RAM, time, calendar, and alarm memory locations remain nonvolatile regardless of the level of the V input must remain within the minimum BAT BAUX and maximum limits when V is not applied. When CC V falls below V , the device inhibits all access putting the part into a low-power mode ...
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The alarm bytes can be used in two ways. First, when the alarm time is written in the appropriate hours, min- utes, and seconds alarm locations, the alarm interrupt is initiated at the specified time each day, if the alarm ...
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Real-Time Clocks Table 3B. Time, Calendar, and Alarm Data Modes—Binary Mode ( ADDRESS BIT 7 BIT 6 00h 0 0 01h 0 0 02h 0 0 03h 0 0 AM/PM 04h 0 0 AM/PM 05h 0 0 06h ...
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Bits Rate Selector Bits (RS3 to RS0). These four rate-selection bits select one of the 13 taps on the 15-stage divider or disable the divider output. The tap selected can be used to generate an output square ...
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Real-Time Clocks Register B (0Bh) MSB BIT 7 BIT 6 BIT 5 SET PIE Bit 7: SET. When the SET bit is 0, the update transfer functions normally by advancing the counts once per second. When the SET bit is ...
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Register C (0Ch) MSB BIT 7 BIT 6 BIT 5 IRQF PF Bit 7: Interrupt Request Flag (IRQF). This bit is set to 1 when any of the following are true PIE = WIE = ...
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Real-Time Clocks Nonvolatile RAM The user RAM bytes are not dedicated to any special function within the DS17x85. They can be used by the processor program as battery-backed memory and are fully available during the update cycle. The user RAM ...
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Periodic Interrupt Selection The periodic interrupt causes the IRQ pin active state from once every 500ms to once every 122µs. This function is separate from the alarm inter- rupt, which can be output from once per ...
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... Register 47h contains a CRC byte used to validate the data in registers 40h–46h. The CRC polynomial is X bytes of the serial number are read-only registers. The DS17x85/DS17x87 is manufactured such that no two devices contain an identical number in locations 41h–47h. DEVICE DS17285/87 DS17485/87 DS17885/ POLYNOMIAL = ...
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Table 5. Extended Bank Register Bank Definition Bank 0 DV0 = 0 00h Timekeeping and Control 0Dh 0Eh 50 Bytes – User RAM 3Fh 40h 64 Bytes – User RAM 7Fh Note: Reserved bits can be written to any value, ...
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Real-Time Clocks Century Counter A register has been added in bank 1, location 48H, to keep track of centuries. The value is read in either bina BCD according to the setting of the DM bit. RTC Write Counter ...
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The timing associated with both the wake-up and kick- starting sequences is illustrated in the Wake- Up/Kickstart Timing Diagram (Figure 6). The timing associated with these functions is divided into five inter- vals, labeled the diagram. ...
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Real-Time Clocks At the beginning of interval 3, the system processor has begun code execution and clears the interrupt condi- tion of WF and/ writing zeros to both of these control bits. As long as no other interrupt ...
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AS CS AD0-7 53H DS OR R/W Figure 7. Burst Mode Timing Waveform Extended Control Registers Two extended control registers are provided to supply control and status information for the extended func- tions offered by the DS17x85/DS17x87. These are des- ...
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Real-Time Clocks Extended Control Register (4Bh) MSB BIT 7 BIT 6 BIT 5 ABE E32k Bit 7: Auxiliary Battery Enable (ABE). When written to logic 1, this bit enables the V BAUX functions. Bit 6: Enable 32.768kHz Output (E32k). When ...
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System Maintenance Interrupt (SMI) Recovery Stack An SMI recovery register stack is located in the extend- ed register bank, locations 4Eh and 4Fh. This register stack, shown below, can be used by the BIOS to recov- er from an SMI ...
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... SQW 22 V BAUX 21 RCLR 20 V BAT 19 IRQ GND ALE DS17285 DS17485 7 DS17885 TSOP Pin Configurations PWR N. SQW N. BAUX AD0 4 21 RCLR AD1 5 20 N.C. DS17287 ...
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... TSOP 24 SO (300 mils (300 mils (300 mils) 24 EDIP 24 EDIP 24 EDIP 24 EDIP CC ____________________________________________________________________ Real-Time Clocks Ordering Information TOP MARK* DS17285-3 DS17285-5 DS17285E3 DS17285E5 DS17285E3 DS17285S-3 DS17285S-5 DS17285SN3 DS17285SN5 DS17287-3 DS17287-5 DS17485-3 DS17485-5 DS17485E3 DS17485E5 DS17485S-3 DS17485S-5 DS17485SN5 DS17487-3 DS17487-3 REAL TIME IND ...
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... Real-Time Clocks Typical Operating Circuit CRYSTAL IRQ ALE WR DS17285 DS17485 RD DS17885 DS83C520 CS AD0–AD7 V SB SUPPLY PWR CONTROL GND CIRCUIT ____________________________________________________________________ PACKAGE V CC DIP SQW SUBSTRATE CONNECTED TO GROUND PROCESS: CMOS RCLR KS For the latest package outline information and land patterns www.maxim-ic.com/packages. Note that a “ ...
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... Ordering Information table; updated the Document No. for the Package Information table. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. ...