73S8014RN Maxim, 73S8014RN Datasheet
73S8014RN
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73S8014RN Summary of contents
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... I/O. The 73S8014RN interfaces with the host processor through the same bus (digital I/Os) as the 73S8024RN, which is compatible with any other 8024-type IC result, the 73S8014RN is a very attractive cost-reduction path from traditional 8024 ICs. The 73S8014RN has been designed to provide full electrical compliance with ISO 7816-3, EMV 4 ...
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... GND TEST VDD FAULT bias currents R-C CONTROLLER OSC. 1.5MHz AND REGISTERS FAULT LOGIC SC SEQUENCER CLOCK CLOCK GENERATION SMART CARD I/O BUFFER Figure 1: 73S8014RN Block Diagram VPC VCC FAULT vref LDO REGULATOR RESET BUFFER CLOCK BUFFER vcc circuits 73S8014RN VCC RST CLK I/O Rev. 1.0 ...
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... Smart Card Interface Requirements ........................................................................................................... 9 2.5 Characteristics: Digital Signals.................................................................................................................. 11 2.6 DC Characteristics .................................................................................................................................... 12 2.7 Voltage Fault Detection Circuits ................................................................................................................ 12 3 Applications Information ............................................................................................................................... 13 3.1 Example 73S8014RN Schematics ............................................................................................................ 13 3.2 NDS Precautions ....................................................................................................................................... 13 3.3 System Controller Interface ....................................................................................................................... 15 3.4 Power Supply and Voltage Supervision .................................................................................................... 15 3.5 Card Power Supply ................................................................................................................................... 16 3.6 On-Chip Oscillator and Card Clock ........................................................................................................... 16 ...
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... Figure 17: Oscillator Circuit ..................................................................................................................................... 24 Figure 18: VDD .............................................................................................................................................. 25 FLT_ADJ Figure 19: Mechanical Drawing 20-Pin SO Package .............................................................................................. 26 Tables Table 1: 73S8014RN 20-Pin SOP Pin Definitions ..................................................................................................... 6 Table 2: Absolute Maximum Device Ratings ............................................................................................................. 8 Table 3: Recommended Operating Conditions ......................................................................................................... 8 Table 4: Package Thermal Parameters ..................................................................................................................... 8 Table 5: DC Smart Card Interface Requirements ..................................................................................................... 9 Table 6: Digital Signals Characteristics ................................................................................................................... 11 Table 7: DC Characteristics ...
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... DS_8014RN_014 1 Pinout The 73S8014RN is supplied as 20-pin SO package. OFF RSTIN I/OUC VPC CLKDIV2 CMDVCC 5V/#V GND XTALIN XTALOUT Rev. 1 73S8014RN Figure 2: 73S8014RN 20-SOP Pin Out 73S8014RN Data Sheet CLKDIV1 20 PRES 19 VCC 18 CLK 17 GND 16 RST 15 I/O 14 VDD 13 VDDF_ADJ 12 TEST 11 5 ...
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... Table 1 provides the 73S8014RN pin names, pin numbers, type, equivalent circuits and descriptions. Table 1: 73S8014RN 20-Pin SOP Pin Definitions Pin Pin Name Number Type Card Interface I RST 15 O CLK 17 O PRES 19 I VCC 18 PSO GND 16 GND Host Processor Interface CMDVCC ...
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... V value (that controls deactivation of the card). DDF Must be left open if unused. System interface supply voltage and supply voltage for internal Figure 11 circuitry. Figure 11 LDO regulator power supply source. – Test pin. Should be tied to GND. – Digital ground. 73S8014RN Data Sheet 7 ...
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... Voltage Fault Detection Circuits 2.1 Absolute Maximum Ratings Table 2 lists the maximum operating conditions for the 73S8014RN. Permanent device damage may occur if absolute maximum ratings are exceeded. Exposure to the extremes of the absolute maximum rating for extended periods may affect device reliability. The smart card interface pins are protected against short circuits to V ground, and each other ...
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... DS_8014RN_014 2.4 Smart Card Interface Requirements Table 5 lists the 73S8014RN Smart Card interface requirements. Table 5: DC Smart Card Interface Requirements Symbol Parameter Card Power Supply (V ) Regulator CC ° General conditions, -40 C < T < 85 NDS conditions, 4.85V < Card supply voltage including ripple and ...
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... Output rise time, fall times Input rise, fall times Internal pull-up resistor PU FD Maximum data rate MAX Delay, I/O to I/OUC, I/OUC to T FDIO I/O, (respectively falling edge to falling edge and rising T edge to rising edge) RDIO C Input capacitance IN 10 Condition ...
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... CLK slew rate SR5V Output rise time, fall time R F δ Duty cycle for CLK 2.5 Characteristics: Digital Signals Table 6 lists the 73S8014RN digital signals characteristics. Symbol Parameter Digital I/O Except for XTALIN and XTALOUT V Input Low Voltage IL V Input High Voltage IH ...
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... External input duty cycle limit 2.6 DC Characteristics Table 7 lists the 73S8014RN DC characteristics. Symbol Parameter I Supply Current DD I Supply Current supply current when V PCOFF PC 2.7 Voltage Fault Detection Circuits Table 8 lists the 73S8014RN Voltage Fault Detection Circuits. Symbol Parameter V fault Voltage supervisor DDF DD threshold) V fault ...
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... DS_8014RN_014 3 Applications Information This section provides general usage information for the design and implementation of the 73S8014RN. The documents listed in Related Documentation 3.1 Example 73S8014RN Schematics Figure 3 shows a typical application schematic for the implementation of the 73S8014RN. Note that minor changes may occur to the reference material from time to time and the reader is encouraged to contact Teridian for the latest information ...
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... GND 9 XTALIN 10 22pF C2 XTALOUT Y1 CRYSTAL 73S8014RN C3 22pF See NOTE 4 R2 47K VDD R4 1K Card detection switch is normally open Smart Card Connector Figure 3: 73S8014RN – Typical Application Schematic See note 5 VDD R3 20 Rext2 CLKDIV1 19 PRES 18 VCC 17 CLK 16 GND 15 RST 14 I/O See NOTE 1 13 ...
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... Power Supply and Voltage Supervision The Teridian 73S8014RN smart card interface ICs incorporate a LDO voltage regulator for V output is controlled by the digital input 5V/#V of the 73S8014RN. This regulator is able to provide either card voltage from the power supply applied on the V 65mA on for both 3V and 5V that complies with EMV 4 ...
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... On-Chip Oscillator and Card Clock The 73S8014RN devices have an on-chip oscillator that can generate the smart card clock using an external crystal (connected between the pins XTALIN and XTALOUT) to set the oscillator frequency. When the clock signal is available from another source, it can be connected to the pin XTALIN, and the pin XTALOUT should be left unconnected ...
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The following steps show the activation sequence and the timing of the card control signals when the system controller pulls the CMDVCC low while the RSTIN is high: CMDVCC is set low will rise to ...
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Deactivation Sequence Deactivation is initiated either by the system controller by setting the CMDVCC high, or automatically in the event of hardware faults. Hardware faults are over-current, V The following steps show the deactivation sequence and the timing of ...
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Fault Detection and OFF There are two different cases that the system controller can monitor the OFF signal: to query regarding the card presence outside card sessions, or for fault detection during card sessions. Outside a card session: In ...
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I/O I/OUC Delay from I/O to I/OUC: Delay from I/OUC to I/O: 20 Neutral State I/O reception Yes I/O & not I/OUC No I/OUC No & not I/O Yes I/OUC in I/OUC yes Figure 8: I/O and I/OUC State Diagram ...
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Equivalent Circuits This section provides illustrations of circuits equivalent to those described in the pinout section. Figure 11: Power Input/Output Circuit, V Rev. 1.0 VDD Output Disable 20K Data From circuit STRONG NFET Figure 10: Open Drain type – ...
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From circuit Figure 12: Type 5 – Smart Card CLK Driver Circuit From circuit Figure 13: Type 6 – Smart Card RST Driver Circuit 22 VCC VERY STRONG ESD PFET CLK PIN ESD VERY STRONG NFET VCC STRONG ESD PFET ...
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From circuit To circuit Figure 14: Type 7A – Smart Card IO Interface Circuit From circuit To circuit Figure 15: Type 7B – Smart Card IOUC Interface Circuit Rev. 1.0 VCC STRONG PFET 400ns DELAY STRONG NFET ESD VDD STRONG ...
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Pull-up Disable To circuit Pull-down Enable Pins CMDVCC, 5V/#V, CLKDIV1 and CLKDIV2 have the pull-up enabled. Note: Pins RSTIN, CLKIN, PRES have the pull-down enabled. XTALIN PIN 24 VERY WEAK PFET Figure 16: Type 8 – General Input Circuit VDD ...
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R = 40k R = 60k Rev. 1.0 VDD FAULT VREF = 1.400v DETECTION + - R = 0.4k (approx.) Figure 18: VDD FLT_ADJ VDD PIN ESD VDDF_ ESD ADJ PIN ESD 25 ...
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Mechanical Drawing Inches (mm) 0.016(.406) Detail A Figure 19: Mechanical Drawing 20-Pin SO Package 26 + .005(.127) 0.5050(12.82) - .009(.228) + .005(.127) - .009(.228) 0.5050(12.82) + .004(.101) 0.050(1.27) - .003(.076) TYP 0°- 8° BASE PLANE SEATING PLANE ± .017(.431) ...
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... Related Documentation The following 73S8014RN document is available from Teridian Semiconductor Corporation: 73S8014R/RN/RT 20SO Demo Board User Manual 8 Contact Information For more information about Teridian Semiconductor products or to check the availability of the 73S8014RN, contact us at: 6440 Oak Canyon Road Irvine, CA 92618-5201 Telephone: (714) 508-8800 FAX: (714) 508-8878 Email: scr ...
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Revision History Revision Date 1.0 12/22/2008 First publication. © 2008 Teridian Semiconductor Corporation. All rights reserved. Teridian Semiconductor Corporation is a registered trademark of Teridian Semiconductor Corporation. Simplifying System Integration is a trademark of Teridian Semiconductor Corporation. All other trademarks ...