MAX6966 Maxim, MAX6966 Datasheet - Page 11

• Manufacturer Part Number: MAX6966
• Description: The MAX6966/MAX6967 serial-interfaced peripherals provide microprocessors with 10 I/O ports rated to 7V
• Manufacturer: Maxim

On power-up, all control registers are reset
Power-up status sets I/O ports P0 to P9 high imped-
ance, and puts the device into shutdown mode. This
means that any LED (or other) loads are effectively
turned off, and the MAX6966/MAX6967 start in its low-
est power condition.
An internal 32kHz oscillator generates PWM timing. If
all output ports are set to static levels, the internal oscil-
Table 3. Initial Power-Up Register Status
Port P0 output level or PWM
Port P1 output level or PWM
Port P2 output level or PWM
Port P3 output level or PWM
Port P4 output level or PWM
Port P5 output level or PWM
Port P6 output level or PWM
Port P7 output level or PWM
Port P8 output level or PWM
Port P9 output level or PWM
Configuration (MAX6966
only)
Configuration (MAX6967
only)
Ramp-down
Ramp-up
Output current ISET70
Output current ISET98
Global current
10-Port Constant-Current LED Drivers and I/O
REGISTER
______________________________________________________________________________________
Expanders with PWM Intensity Control
I
I
PEAK
PEAK
DOUT/OSC is DOUT output
POWER-UP CONDITION
DOUT/OSC is OSC input
Port 0 high impedance
Port 1 high impedance
Port 2 high impedance
Port 3 high impedance
Port 4 high impedance
Port 5 high impedance
Port 6 high impedance
Port 7 high impedance
Port 8 high impedance
Port 9 high impedance
= 10mA for ports P9, P8
= 10mA for ports P7–P0
Shutdown mode,
Shutdown mode,
CS run disabled,
CS run disabled,
Fade disabled
Full current
Initial Power-Up
—
PWM Clock
(Table
3).
CODE (HEX)
ADDRESS
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x10
0x11
0x12
0x13
0x14
0x15
lator and PWM logic are disabled automatically, and
the MAX6966/MAX6967 operating current is lowest.
The internal 32kHz oscillator can be replaced by a user
clock up to 100kHz if a precise or synchronized PWM
frequency source is desired. The clock is fed into the
dual-use DOUT/OSC pin, which is switched between a
port output and a clock input using the OSC bit in the
configuration register
D7
1
1
1
1
1
1
1
1
1
1
0
1
0
0
0
0
0
D6
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
(Table
D5
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
REGISTER DATA
D4
4).
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
D3
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
D2
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
1
D1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
1
D0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
1
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