LMH0356SQ-40/NOPB National Semiconductor, LMH0356SQ-40/NOPB Datasheet - Page 14
![IC RECLOCKER SDI HD/SD 40-LLP](/photos/6/92/69242/pkg_sqf40a_sml.jpg)
LMH0356SQ-40/NOPB
Manufacturer Part Number
LMH0356SQ-40/NOPB
Description
IC RECLOCKER SDI HD/SD 40-LLP
Manufacturer
National Semiconductor
Type
Reclockerr
Datasheet
1.LMH0356SQENOPB.pdf
(18 pages)
Specifications of LMH0356SQ-40/NOPB
Applications
SDTV/HDTV
Mounting Type
Surface Mount
Package / Case
40-LLP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LMH0356SQ-40
www.national.com
Application Information
Figure 4
version of the LMH0356.
ENABLE has an internal pullup to enable the device by de-
fault. This pin may be pulled low to put the LMH0356 into a
powered down mode.
BYPASS/AUTO BYPASS has an internal pulldown to enable
Auto Bypass mode by default. This pin may be pulled high to
force the LMH0356 to bypass all data.
OUTPUT MUTE has an internal pullup to enable the outputs
by default. This pin may be pulled low to mute the outputs.
The XTAL IN/EXT CLK and XTAL OUT pins are shown with
a 27 MHz crystal and the proper loading. The crystal should
match the parameters described in
27MHz LVCMOS compatible clock signal may be input to
XTAL IN/EXT CLK.
The active high LOCK DETECT output provides an indication
that proper data is being received and the PLL is locked.
The SD/HD output may be used to drive the SD/HD pin of an
SDI cable driver (such as the LMH0302) in order to properly
set the cable driver’s edge rate for SMPTE compliance. It de-
faults to HD/3G (low) when the LMH0356 is not locked.
shows a typical application circuit for the 48-pin LLP
Table
4. Alternately, a
FIGURE 4. Application Circuit
14
SCO_EN has an internal pulldown to set the second output
(SCO/SDO2) to output data. This pin may be pulled high to
set the second output as a serial clock.
The external loop filter capacitor (between LF1 and LF2)
should be 56 nF. This is the only supported value; the loop
filter capacitor should not be changed.
RATE0 and RATE1 have internal pulldowns to select Auto-
Rate Detect mode by default. These pins may also be used
to set the device to SD mode or HD/3G mode.
SEL0 and SEL1 have internal pulldowns to select the SDI0
input by default.
The inputs are LVPECL compatible. The LMH0356 has a
wide input common mode range and in most cases the input
should be DC coupled. For DC coupling, the inputs must be
kept within the common mode range specified in
Characteristics.
Figure 5
tween the LMH0344 cable equalizer and the LMH0356. The
LMH0344 output common mode voltage and voltage swing
shows an example of a DC coupled interface be-
DC Electrical
30016704