DS4420 Maxim, DS4420 Datasheet - Page 9

• Manufacturer Part Number: DS4420
• Description: The DS4420 is a fully differential, programmable gain amplifier for audio applications
• Manufacturer: Maxim

Byte Read: A byte read is an 8-bit information transfer
from the slave to the master plus a 1-bit ACK or NACK
from the master to the slave. The 8 bits of information
that are transferred (most significant bit first) from the
slave to the master are read by the master using the bit
read definition above, and the master transmits an ACK
using the bit write definition to receive additional data
bytes. The master must NACK the last byte read to ter-
minate communication so the slave will return control of
SDA to the master.
Slave Address Byte: Each slave on the I
responds to a slave address byte sent immediately fol-
lowing a start condition. The slave address byte con-
tains the slave address in the most significant 7 bits
and the R/W bit in the least significant bit.
The DS4420’s slave address is determined by the state
of the A0, A1, and A2 address pins as shown in Figure
2. Address pins connected to GND result in a ‘0’ in the
corresponding bit position in the slave address.
Conversely, address pins connected to V
‘1’ in the corresponding bit positions.
When the R/W bit is 0 (such as in A0h), the master is indi-
cating it will write data to the slave. If R/W is set to a 1,
(A1h in this case), the master is indicating it wants to read
from the slave.
If an incorrect (nonmatching) slave address is written,
the DS4420 will assume the master is communicating
with another I
until the next start condition is sent.
Memory Address: During an I
DS4420, the master must transmit a memory address to
identify the memory location where the slave is to store
Figure 4. I
COMMUNICATIONS KEY
WRITE THE GAIN SETTING
READ THE GAIN SETTING
Sr
S
P
S
S
2
C Communication Examples
1 0 1
1 0 1
START
STOP
REPEATED
START
2
C device and ignore the communication
0
0
A
N
A
A
2
2
A
A
X X X X X X X X
NOT
ACK
ACK
1
1
A
A
0
0
0
0
2
A
A
C write operation to the
1 1 1
1 1 1
SHADED BOXES INDICATE THE SLAVE IS
CONTROLLING SDA
WHITE BOXES INDICATE THE MASTER IS
CONTROLLING SDA
I
2
_____________________________________________________________________
C Programmable-Gain Amplifier
1
1
CC
F8h
F8h
8-BITS ADDRESS OR DATA
1
1
result in a
0
0
2
0 0
0 0
C bus
A
A
Sr
REGISTER SETTING
the data. The memory address is always the second
byte transmitted during a write operation following the
slave address byte.
Writing a Single Byte to a Slave: The master must gen-
erate a start condition, write the slave address byte (R/W
= 0), write the memory address, write the byte of data,
and generate a stop condition. The master must read the
slave’s acknowledgement during all byte write operations.
Reading a Single Byte from a Slave: Unlike the write
operation that uses the specified memory address byte
to define where the data is to be written, the read oper-
ation occurs at the present value of the memory
address counter. A dummy write cycle can be used to
force the address pointer to a desired location. To do
this, the master generates a start condition, writes the
slave address byte (R/W =0), writes the memory
address where it desires to read, generates a repeated
start condition, writes the slave address byte (R/W = 1),
reads the data byte with a NACK to indicate the end of
the transfer, and generates a stop condition.
See Figure 4 for I
The DS4420 has separate supply voltages for its ana-
log and digital circuitry. For best noise and distortion
performance, place a 0.1µF or 0.01µF capacitor from
V
tors should be placed as close as possible to the sup-
ply and ground pins of the device.
1 0 1
CC
for Audio Applications
NOTE 1: ALL BYTES ARE SENT MOST SIGNIFICANT BIT FIRST.
NOTE 2: THE FIRST BYTE SENT AFTER A START CONDITION IS
to GND and from AV
0
ALWAYS THE SLAVE ADDRESS FOLLOWED BY THE
READ/WRITE BIT.
A
2
A
1
A
0
A
Applications Information
1
2
C communication examples.
A
P
Power-Supply Decoupling
REGISTER SETTING
CC
I
to AGND. These capaci-
2
C Communication
N
P
9