DG405 Maxim, DG405 Datasheet - Page 6
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DG405
Manufacturer Part Number
DG405
Description
Maxim's redesigned DG401/DG403/DG405 analog switches now feature guaranteed low on-resistance matching between switches (2Ω max) and guaranteed on-resistance flatness over the signal range (3Ω max)
Manufacturer
Maxim
Datasheet
1.DG401.pdf
(8 pages)
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Improved, Dual, High-Speed Analog Switches
______________________________________________Timing Diagrams/Test Circuits
6
Figure 4. Charge Injection
Figure 2. Switching Time
Figure 3. Break-Before-Make Interval
_______________________________________________________________________________________
LOGIC
INPUT
SWITCH
OUTPUT 1
SWITCH
OUTPUT 2
V OUT
LOGIC
INPUT
SWITCH
OUTPUT
IN
+3V
0V
0V
0V
LOGIC INPUT WAVEFORM IS INVERTED FOR
SWITCHES THAT HAVE THE OPPOSITE LOGIC
SENSE CONTROL.
V OUT2
ON
+3V
0V
0V
V OUT1
V OUT
V OUT
t D
V OUT
50%
t ON
50%
Q = ( V OUT ) (C L )
0.9 x V OUT
0.9 x V OUT
OFF
t OFF
tr < 20ns
t f < 20ns
t D
0.9 x V OUT
0.9 x V OUT
ON
V
V
LOGIC
INPUT
D
D
= +10V (for t ON )
= -10V (for t OFF )
LOGIC
INPUT
C L INCLUDES FIXTURE AND STRAY CAPACITANCE.
+10V
+10V
FOR LOAD CONDITIONS, SEE Electrical Characteristics.
C L INCLUDES FIXTURE AND STRAY CAPACITANCE.
R GEN
D
D
IN
+5V
GND
V GEN
0V
V L
REPEAT TEST FOR IN2 AND S2
D
IN
+5V
GND
0V
V L
S
+5V
GND
V
0V
L
+15V
-15V
V-
V+
+15V
S
S
-15V
V+
V-
R L2
S
-15V
+15V
V+
V-
V OUT2
V OUT = V
D
R L = 1000
C L = 35pF
R L = 1000
C L = 35pF
C L2
V OUT
D
R L1
(
R L + r
C L
10nF
V OUT1
DG401
DG403
DG405
R L
DG401
DG403
DG405
DS(ON)
DG401
DG403
DG405
V OUT
)
C L1