DG419L Maxim, DG419L Datasheet - Page 9
DG419L
Manufacturer Part Number
DG419L
Description
The DG417L/DG418L/DG419L precision, CMOS analog switches feature low on-resistance (RON = 35Ω), guaranteed RON matching between switches (3Ω max), and guaranteed RON flatness over the signal range (4Ω max)
Manufacturer
Maxim
Datasheet
1.DG417L.pdf
(13 pages)
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Most CMOS switches require specific power-supply
sequencing in order to prevent device latchup. The
older DG417/DG418/DG419 devices require a proper
power-supply sequence of V+, V
Figure 3. DG419L Break-Before-Make Interval
Figure 4. Charge Injection
______________________________________Test Circuits/Timing Diagrams (continued)
LOGIC
INPUT
V
COM
V
+3V
OUT
0
IN
IN
OFF
OFF
Applications Information
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
_______________________________________________________________________________________
Sequencing-Free Operation
Q = ∆V
t
D
ON
ON
OUT
Logic-Compatible Analog Switches
x C
L
, then V-. Otherwise,
L
Power-Supply
∆V
OUT
0.9 x V
OFF
OFF
OUT
LOGIC
INPUT
+10V
it is necessary to add signal diodes to the circuit in
order to prevent potential latchups. The new
DG417L/DG418L/DG419L devices eliminate the need
for a V
not exceed the absolute maximum ratings because
stresses beyond the listed ratings may cause perma-
nent damage to the devices.
V
GEN
35Ω, SPST/SPDT, +3V
L
C
input and allow any power-up sequence. Do
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
NC
NO
IN
COM
GND
GND
N.C.
V
DG419L
IN
V+
V+
V-
V-
= +3V
V+
V+
V-
V-
COM
NC OR
NO
DG417L
DG418L
DG419L
C
1nF
R
300Ω
L
L
V
OUT
C
35pF
V
L
OUT
9