MAX4820 Maxim, MAX4820 Datasheet
MAX4820
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MAX4820 Summary of contents
Page 1
... Built-in hysteresis (Schmidt trigger) on all digital inputs allows this device to be used with slow rising and falling signals, such as those from optocouplers or RC power-up initialization circuits. The MAX4820/MAX4821 are available in 20-pin TSSOP and space-saving 20-pin Thin QFN packages. Applications Central Office ...
Page 2
... Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...
Page 3
... -40°C to +85°C, unless otherwise noted. Typical values are COM CC A PARAMETER SYMBOL SPI TIMING (MAX4820) Turn-On Time (OUT_) Turn-Off Time (OUT_) SCLK Frequency Cycle Time Fall to SCLK Rise Setup CS Rise to SCLK Hold SCLK High Time ...
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Cascadable Relay Drivers with Serial/Parallel Interface ( -40°C to +85°C, unless otherwise noted. Typical values are at T COM CC A SUPPLY CURRENT vs. SUPPLY VOLTAGE 25 ALL LOGIC INPUTS = 0 20 ...
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... RESET low at the same time, then RESET takes precedence. Chip-Select Input. MAX4820: Drive CS low to select the device. When CS is low, data at DIN is clocked into the 8-bit shift register on SCLK’s rising edge. Drive CS from low CS to high to latch the data to the registers and activate the appropriate relays. ...
Page 6
... Built-in hys- teresis (Schmidt trigger) on all digital inputs allows this device to be used with slow rising and falling signals, such as those from optocouplers or RC power-up ini- tialization circuits. The MAX4820/MAX4821 are avail- able in 20-pin TSSOP and space-saving 20-pin Thin QFN packages. FUNCTION ...
Page 7
... CSS SCLK DIN D7 DOUT OUT_ Figure 1. 3-Wire Serial-Interface Timing Diagram (MAX4820 only) Table 1. Serial Input Address Map (MAX4820 Only) DIN D0 D1 OUT_ OUT1 OUT2 Serial Interface (MAX4820) The serial interface consists of an 8-bit shift register and parallel latch controlled by SCLK and CS. The input to the shift register is an 8-bit word ...
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... RESET overrides all other inputs, including SET. The MAX4820 features a digital output, DOUT, that pro- vides a simple way to daisy chain multiple devices. This feature allows the user to drive large banks of relays using only a single serial interface ...
Page 9
... Cascadable Relay Drivers is shifted through all the MAX4820s in series. When CS goes high, all outputs update simultaneously. The MAX4820 can also be used in a slave configuration that allows the user to address individual devices. Connect all the DIN pins together, and use the CS input to address one device at a time ...
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... Cascadable Relay Drivers with Serial/Parallel Interface V CC RESET SET DIN DOUT SCLK RESET SET LVL ______________________________________________________________________________________ COM MAX4820 PARALLEL REGISTER 8-BIT SHIFT REGISTER PGND GND COM MAX4821 PARALLEL LATCH 4-TO-8 DECODER GND PGND Functional Diagrams OUT1 OUT2 OUT3 OUT4 OUT5 ...
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... THIN QFN *CONNECT EP TO GND. Chip Information PROCESS: BiCMOS ______________________________________________________________________________________ with Serial/Parallel Interface Pin Configurations (continued SET 2 19 RESET OUT3 OUT4 MAX4820 DIN COM SCLK OUT5 DOUT OUT6 N. GND 9 12 *EP OUT8 10 11 ...
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... Added Reflow Temperature to the Absolute Maximum Ratings section. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. ...