MAX9154 Maxim, MAX9154 Datasheet
MAX9154
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MAX9154 Summary of contents
Page 1
... The devices accept a single LVDS input (MAX9153) or single LVPECL input (MAX9154) and repeat the signal at 10 LVDS outputs. Each differential output drives 100Ω, allowing point-to- point distribution of signals on transmission lines with 100Ω ...
Page 2
... DC ELECTRICAL CHARACTERISTICS (V = +3.0V to +3.6V 100Ω ±1%, differential input voltage | / /2|, MAX9154 LVPECL input voltage range = wise noted. Typical values are +3.3V PARAMETER SYMBOL CONTROL INPUT (PWRDN) ...
Page 3
... Low-Jitter, 800Mbps, 10-Port LVDS DC ELECTRICAL CHARACTERISTICS (continued +3.0V to +3.6V 100Ω ±1%, differential input voltage | / /2|, MAX9154 LVPECL input voltage range = wise noted. Typical values are +3.3V PARAMETER SYMBOL Input Resistor 3 (MAX9154) R LVDS OUTPUT (DO_+, DO_-) ...
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... PPS2 Note 10: Device meets V DC specification, and AC specifications while operating _______________________________________________________________________________________ = 5pF, differential input voltage |V L /2|, MAX9154 LVPECL input voltage range = +3.3V 0.2V 1.2V CONDITIONS t ...
Page 5
Low-Jitter, 800Mbps, 10-Port LVDS (V = +3.3V 100Ω 5pF SUPPLY CURRENT vs. FREQUENCY 170 160 150 140 130 120 110 100 100 1000 INPUT FREQUENCY (MHz) DIFFERENTIAL ...
Page 6
... Ground Power. Bypass each V pin to GND with 0.1µF and 1nF ceramic capacitors. CC LVDS (MAX9153) or LVPECL (MAX9154) Differential Inputs. RIN+ and RIN- are high-impedance inputs. Connect a resistor from RIN+ to RIN- to terminate the input signal. applications. The MAX9153 accepts an LVDS input and has a fail-safe input circuit. The MAX9154 accepts an LVPECL input ...
Page 7
... V ing the fail-safe circuit and forcing the outputs high (Figure 1). The MAX9154 is essentially the MAX9153 without the fail-safe circuit. The MAX9154 accepts input voltages from allows interfacing to LVPECL input signals while retain- ing a good common-mode tolerance ...
Page 8
... The output voltage swing is determined by the value of the termination resistor multiplied by the output current. With a typical 3.8mA output current, the MAX9153/MAX9154 pro- duce a 380mV output voltage when driving a transmission line terminated with a 100Ω resistor (3.8mA x 100Ω = 380mV) ...
Page 9
... GENERATOR Figure 4. Propagation Delay and Transition Time Test Circuit RIN- RIN+ Figure 5. Propagation Delay and Transition Time Waveforms _______________________________________________________________________________________ Repeaters with 100 Ω Drive Test Circuits and Timing Diagrams (continued 5pF MAX9153 MAX9154 C L 5pF 50Ω C RIN+ L 5pF RIN- 50Ω C ...
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... Figure 6. Power-Up/Down Delay Test Circuit PWRDN V WHEN V DO_+ V WHEN V DO_- V WHEN V DO_+ V WHEN V DO_- Figure 7. Power-Up/Down Delay Waveforms 10 ______________________________________________________________________________________ Test Circuits and Timing Diagrams (continued 5pF MAX9153 MAX9154 C L 5pF C RIN+ L 5pF RIN 5pF 50Ω 50 50% = +50mV ID = -50mV ID = -50mV ...
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... Low-Jitter, 800Mbps, 10-Port LVDS Pin Configuration TOP VIEW MAX9153 MAX9154 DO2+ 1 DO2- 2 DO1+ 3 DO1- 4 PWRDN 5 GND 6 RIN+ 7 RIN- 8 GND DO10+ 11 DO10- 12 DO9+ 13 DO9- 14 TSSOP Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied ...