MAX9172 Maxim, MAX9172 Datasheet

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MAX9172

Manufacturer Part Number
MAX9172
Description
The MAX9171/MAX9172 single/dual low-voltage differential signaling (LVDS) receivers are designed for high-speed applications requiring minimum power consumption, space, and noise
Manufacturer
Maxim
Datasheet

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The MAX9171/MAX9172 single/dual low-voltage differential
signaling (LVDS) receivers are designed for high-speed
applications requiring minimum power consumption,
space, and noise. Both devices support switching rates
exceeding 500Mbps while operating from a single 3.3V
supply.
The MAX9171 is a single LVDS receiver and the
MAX9172 is a dual LVDS receiver. Both devices con-
form to the ANSI TIA/EIA-644 LVDS standard and con-
vert LVDS to LVTTL/LVCMOS-compatible outputs. A
fail-safe feature sets the outputs high when the inputs
are undriven and open, terminated, or shorted. The
MAX9171/MAX9172 are available in 8-pin SO packages
and space-saving thin DFN and SOT23 packages.
For lower skew devices, refer to the MAX9111/ MAX9113
data sheet.
19-2578; Rev 2; 6/07
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
N.C.
N.C.
IN+
IN-
1
2
3
4
Multipoint Backplane Interconnect
Laser Printers
Digital Copiers
Cellular Phone Base Stations
LCD Displays
Network Switches/Routers
Clock Distribution
SO/TDFN*
MAX9171
________________________________________________________________ Maxim Integrated Products
8
7
6
5
General Description
V
OUT
N.C.
GND
CC
Single/Dual LVDS Line Receivers with
GND
OUT
N.C.
V
CC
Applications
1
2
3
4
MAX9171
SOT23
8
7
6
5
IN-
IN+
N.C.
N.C.
IN1+
IN2+
IN1-
IN2-
o Input Accepts LVDS and LVPECL
o In-Path Fail-Safe Circuit
o Space-Saving 8-Pin TDFN and SOT23 Packages
o Fail-Safe Circuitry Sets Output High for Open,
o Flow-Through Pinout Simplifies PCB Layout
o Guaranteed 500Mbps Data Rate
o Second Source to DS90LV018A and DS90LV028A
o Conforms to ANSI TIA/EIA-644 Standard
o 3.3V Supply Voltage
o -40°C to +85°C Operating Temperature Range
o Low-Power Dissipation
Note: All devices are specified over the -40°C to +85°C operating
temperature range.
*Future product—contact factory for availability.
**EP = Exposed pad.
T = Tape-and-reel.
MAX9171EKA-T
MAX9171ESA
MAX9171ETA*
MAX9172EKA-T
MAX9172ESA
MAX9172ETA*
Undriven Shorted, or Undriven Terminated Output
(SO Packages Only)
1
2
3
4
PART
SO/TDFN*
MAX9172
“In-Path” Fail-Safe
8
7
6
5
PIN-PACKAGE
8 SOT23-8
8 SO
8 Thin DFN-EP**
8 SOT23-8
8 SO
8 Thin DFN-EP**
V
OUT1
OUT2
GND
Ordering Information
CC
Pin Configurations
OUT1
OUT2
GND
V
CC
1
2
3
4
MARK
MAX9172
AALX
AALY
SOT23
TOP
Features
T833-2
T833-2
CODE
PKG
K8-1
S8-2
K8-1
S8-2
8
7
6
5
IN1-
IN1+
IN2+
IN2-
1

Related parts for MAX9172

MAX9172 Summary of contents

Page 1

... The MAX9171 is a single LVDS receiver and the MAX9172 is a dual LVDS receiver. Both devices con- form to the ANSI TIA/EIA-644 LVDS standard and con- vert LVDS to LVTTL/LVCMOS-compatible outputs. A fail-safe feature sets the outputs high when the inputs are undriven and open, terminated, or shorted ...

Page 2

... V IN+ IN- or open (Figure 1) Open, undriven short, or undriven parallel termination I = -4.0mA 4.0mA -100mV (Note 3) OS OUT_ MAX9171 I Inputs open CC MAX9172 , common-mode voltage 3.3V 0.2V MIN TYP MAX UNITS -40 0 -100 -40 +0.5 -2.1 -5 -0.5 0 +0.5 -0.5 +4.4 +10 ...

Page 3

... Low to High Differential Pulse Skew | PHLD PLHD Differential Channel-to-Channel Skew (MAX9172) Differential Part-to-Part Skew Rise Time Fall Time Maximum Operating Frequency Note 1: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to GND except and V ...

Page 4

... FREQUENCY (MHz) 2.0 1.9 1.8 1.7 1.6 1.5 -40 3.4 3.5 3.6 OUTPUT SHORT-CIRCUIT CURRENT vs. SUPPLY VOLTAGE - +200mV, OUTPUT ID SHORTED TO GROUND -70 -75 -80 -85 3.6 3.0 3.1 3.2 3.3 3.4 SUPPLY VOLTAGE (V) MAX9172 SUPPLY CURRENT vs. TEMPERATURE 1MHz BOTH CHANNELS SWITCHING 1000 -40 - TEMPERATURE (°C) DIFFERENTIAL PROPAGATION DELAY vs. TEMPERATURE t PHLD t PLHD - TEMPERATURE (°C) 3.5 3.6 ...

Page 5

Single/Dual LVDS Line Receivers with (V = 3.3V 1.2V 0.2V DIFFERENTIAL PULSE SKEW vs. SUPPLY VOLTAGE 120 3.0 3.1 3.2 3.3 3.4 3.5 SUPPLY VOLTAGE (V) DIFFERENTIAL ...

Page 6

... IN1- — onl y) EP Detailed Description The MAX9171/MAX9172 feature LVDS inputs for inter- facing high-speed digital circuitry. The LVDS interface standard is a signaling method intended for point-to- point communication over controlled-impedance media, as defined by the ANSI TIA/EIA-644 standards. The technology uses low-voltage signals to achieve fast transition times and minimize power dissipation and noise immunity ...

Page 7

... OUT_ Figure 3. Propagation Delay and Transition Time Waveforms _______________________________________________________________________________________ The MAX9171/MAX9172 have in-path fail-safe that is compatible with in-path fail-safe receivers, such as the DS90LV018A and DS90LV028A. Refer to the MAX9111/ MAX9113 data sheet for pin-compatible receivers with parallel fail-safe and lower jitter. Refer to the MAX9130 data sheet for a single LVDS receiver with parallel fail- safe in an SC70 package ...

Page 8

... When using the MAX9171/MAX9172, minimize the dis- tance between the input termination resistors and the MAX9171/MAX9172 receiver inputs. Use a single 1% surface-mount resistor. For LVDS applications, a four-layer PCB that provides separate power, ground, LVDS signals, and output sig- nals is recommended ...

Page 9

... Single/Dual LVDS Line Receivers with (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) _______________________________________________________________________________________ “In-Path” Fail-Safe Package Information 9 ...

Page 10

... Single/Dual LVDS Line Receivers with “In-Path” Fail-Safe (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages TOP VIEW FRONT VIEW 10 ______________________________________________________________________________________ Package Information (continued) ...

Page 11

... Single/Dual LVDS Line Receivers with (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) ______________________________________________________________________________________ “In-Path” Fail-Safe Package Information (continued) 11 ...

Page 12

... Pages changed at Rev 10, 11, 12 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. ...

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