MAX9181 Maxim, MAX9181 Datasheet

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MAX9181

Manufacturer Part Number
MAX9181
Description
The MAX9181 is an LVPECL-to-LVDS level translator that accepts a single LVPECL input and translates it to a single LVDS output
Manufacturer
Maxim
Datasheet
The MAX9181 is an LVPECL-to-LVDS level translator
that accepts a single LVPECL input and translates it to
a single LVDS output. It is ideal for interfacing between
LVPECL and LVDS interfaces in systems that require
minimum jitter, noise, power, and space.
Ultra-low, 23ps
0.6ps
nication in high-speed links that are highly sensitive to
timing errors, especially those incorporating clock-and-
data recovery, PLLs, serializers, or deserializers. The
MAX9181’s switching performance guarantees a
400Mbps data rate, but minimizes radiated noise by
guaranteeing 0.5ns minimum output transition time.
The MAX9181 operates from a single 3.3V supply and
consumes only 10mA supply current over a -40°C to
+85°C temperature range. It is available in a tiny 6-pin
SC70 package (half the size of a SOT23). Refer to the
MAX9180 data sheet for a low-jitter, low-noise LVDS
repeater in an SC70 package.
19-2415; Rev 1; 2/04
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
RMS
Digital Cross-Connects
Add/Drop Muxes
Network Switches/Routers
Cellular Phone Base Stations
DSLAMs
Multidrop Buses
LVPECL
DRIVER
Low-Jitter, Low-Noise LVPECL-to-LVDS Level
added random jitter ensure reliable commu-
3.3V
Typical Operating Circuit
P-P
________________________________________________________________ Maxim Integrated Products
IN+
IN-
added deterministic jitter and
General Description
MAX9181
GND
V
CC
Applications
OUT+
OUT-
Translator in an SC70 Package
SIGNALS
LVDS
MAX9181EXT-T
Tiny SC70 Package
Ultra-Low Jitter
0.5ns (min) Transition Time Minimizes Radiated
Noise
400Mbps Guaranteed Data Rate
Low 10mA Supply Current
Conforms to ANSI/EIA/TIA-644 LVDS Standard
High-Impedance Inputs and Outputs in
Power-Down Mode
PART
23ps
(2
0.6ps
TOP VIEW
23
- 1 PRBS)
P-P
RMS
OUT-
Added Deterministic Jitter
GND
IN-
Added Random Jitter
1
2
3
-40°C to +85°C
TEMP RANGE
Ordering Information
MAX9181
SC70
Pin Configuration
6
5
4
PIN -
PA C K A G E
6 SC70-6
OUT+
V
IN+
CC
Features
M ARK
TOP
ABI
1

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MAX9181 Summary of contents

Page 1

... MAX9181’s switching performance guarantees a 400Mbps data rate, but minimizes radiated noise by guaranteeing 0.5ns minimum output transition time. The MAX9181 operates from a single 3.3V supply and consumes only 10mA supply current over a -40°C to +85°C temperature range available in a tiny 6-pin SC70 package (half the size of a SOT23) ...

Page 2

... SC70 (derate 3.1mW/°C above +70°C) ..............245mW Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...

Page 3

Low-Jitter, Low-Noise LVPECL-to-LVDS Level AC ELECTRICAL CHARACTERISTICS (V = 3.0V to 3.6V 100Ω ±1 otherwise noted. Typical values are at V PARAMETER Differential Propagation Delay High to Low Differential Propagation Delay Low to High Added ...

Page 4

Low-Jitter, Low-Noise LVPECL-to-LVDS Level Translator in an SC70 Package (V = 3.3V 100Ω ±1 10pF frequency = 200MHz, 50% duty cycle SUPPLY CURRENT vs. INPUT FREQUENCY ...

Page 5

... The MAX9181 accepts differential LVPECL inputs and produces an LVDS output. The input voltage range includes signals from GND eration with 3.3V LVPECL devices. OUTPUT, V The MAX9181 provides a high output when the inputs OD are open. See Table 1. High Low Indeterminate ...

Page 6

... The MAX9181 is guaranteed to produce LVDS output levels into 100Ω. With the typical 3.6mA output current, the MAX9181 pro- duces an output voltage of 360mV when driving a 100Ω transmission line terminated with a 100Ω termination resistor (3 ...

Page 7

Low-Jitter, Low-Noise LVPECL-to-LVDS Level IN+ IN Figure 1. LVPECL Input Bias 1.25V IN+ 1.20V V OD 1.25V IN- 1.20V Figure 2. DC Load Test Circuit IN- IN+ OUT- OUT+ V DIFF Figure 4. Transition ...

Page 8

... For the latest package outline information www.maxim-ic.com/packages.) Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. ...

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