MAX9260 Maxim, MAX9260 Datasheet - Page 13

• Manufacturer Part Number: MAX9260
• Description: The MAX9259/MAX9260 chipset presents Maxim's gigabit multimedia serial link (GMSL) technology
• Manufacturer: Maxim

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1
2
3
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6
Gigabit Multimedia Serial Link with Spread
Spectrum and Full-Duplex Control Channel
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ENABLE
IN+, IN-
RX/SDA
GPIO0
GPIO1
NAME
AGND
DGND
AVDD
DVDD
BWS
CDS
DCS
EQS
INT
MS
ES
Enable. Active-low parallel output-enable input requires external pulldown or pullup
resistors. Set ENABLE = low to enable PCLKOUT, SD, SCK, WS, and the parallel out-
puts, DOUT_. Set ENABLE = high to put PCLKOUT, SD, SCK, WS, and DOUT_ to high
impedance.
Bus-Width Select. Parallel output bus-width selection input requires external pulldown
or pullup resistors. Set BWS = low for 24-bit bus mode. Set BWS = high for 32-bit bus
mode.
Interrupt. Interrupt input requires external pulldown or pullup resistors. A transition on
the INT input of the MAX9260 toggles the MAX9259’s INT output.
Control-Direction Selection. Control-link-direction selection input requires external pull-
down or pullup resistors. Set CDS = low for FC use on the MAX9259 side of the serial
link. Set CDS = high for FC use on the MAX9260 side of the serial link.
GPIO0. Open-drain general-purpose input/output with internal 60kI pullup resistors to
IOVDD. GPIO0 is high impedance during power-up and when PWDN = low.
Edge Select. PCLKOUT edge-selection input requires external pulldown or pullup
resistors. Set ES = low for a rising-edge trigger. Set ES = high for a falling-edge trigger.
3.3V Analog Power Supply. Bypass AVDD to AGND with 0.1µF and 0.001µF capacitors
as close as possible to the device with the smallest value capacitor closest to AVDD.
Differential CML Input +/-. Differential inputs of the serial link.
Analog Ground
Equalizer Select. Deserializer equalizer-selection input requires external pulldown or
pullup resistors. The state of EQS latches upon power-up or rising edge of PWDN. Set
EQS = low for 10.7dB equalizer boost (EQTUNE = 1001). Set EQS = high for 5.2dB
equalizer boost (EQTUNE = 0100).
GPIO1. Open-drain general-purpose input/output with internal 60kI pullup resistors to
IOVDD. GPIO1 is high impedance during power-up and when PWDN = low.
Drive Current Select. Driver current-selection input requires external pulldown or pul-
lup resistors. Set DCS = high for stronger parallel data and clock output drivers. Set
DCS = low for normal parallel data and clock drivers (see the MAX9260 DC Electrical
Characteristics table).
Mode Select. Control-link mode-selection/autostart mode selection input requires
external pulldown or pullup resistors. MS sets the control-link mode when CDS = high
(see the Control-Channel and Register Programming section). Set MS = low to select
base mode. Set MS = high to select the bypass mode. MS sets autostart mode when
CDS = low (see Tables 13 and 14).
3.3V Digital Power Supply. Bypass DVDD to DGND with 0.1FF and 0.001FF capacitors
as close as possible to the device with the smaller value capacitor closest to DVDD.
Digital Ground
Receive/Serial Data. UART receive or I
pullup to IOVDD. In UART mode, RX/SDA is the Rx input of the MAX9260’s UART. In
I
2
C mode, RX/SDA is the SDA input/output of the MAX9259’s I
FUNCTION
2
C serial-data input/output with internal 30kI
MAX9260 Pin Description
2
C master.
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