LM1971MNOPB NATIONAL, LM1971MNOPB Datasheet - Page 7

• Manufacturer Part Number: LM1971MNOPB
• Manufacturer: NATIONAL

Application Information
(Continued)
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*Note: Load and clock falling edges can be coincident, however, the clock falling edge cannot be delayed more than 20 ns from the falling edge of load. It is
preferrable that the falling edge of clock occurs before the falling edge of load.
FIGURE 2. Timing Diagram
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FIGURE 3. Serial Data Format Transfer Process
µPOT LADDER ARCHITECTURE
The µPot contains a chain of R1/R2 resistor dividers in a
ladder form, as shown in Figure 4. Each R1 is actually a
series of 8 resistors, with a CMOS switch that taps into the
resistor chain according to the attenuation level chosen. For
any given attenuation setting, there is only one CMOS switch
closed (no paralleling of ladders). The input impedance
therefore remains constant, while the output impedance
changes as the attenuation level changes. It is important to
note that the architecture is a series of resistor dividers, and
not a straight, tapped resistor, so the µPot is not a variable
resistor; it is a variable voltage divider.
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FIGURE 4. Resistor Ladder Architecture
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