CHL8112A-00CRT International Rectifier, CHL8112A-00CRT Datasheet
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CHL8112A-00CRT
Manufacturer Part Number
CHL8112A-00CRT
Description
Dual Loop, 4+1 multiphase AMD PWM controller for high efficiency, highly accurate VR solutions
Manufacturer
International Rectifier
Datasheet
1.CHL8112B-00CRT.pdf
(2 pages)
Specifications of CHL8112A-00CRT
Controller
CPU
Overclocking
Yes
Auto-psi/dpc
Yes
Vgd
Yes
Voltage Outputs (#)
2
Phases (#)
5
Typical Configuration
4 + 1 Multiphase
I2c
Yes
Smbus
Yes
Pmbus
Yes
Package
QFN 6 x 6
Trademarks and registered trademarks are the property of the respective
owners.
PB0012 Rev. 0.04, August 25, 2010
FEATURES
DESCRIPTION
The CHL8112A/B are dual-loop digital multi-phase buck
controllers that drive up to 5 phases. The CHL8112A/B is
fully AMD® SVI compliant on both loops and provides a Vtt
tracking function for DDR memory.
NVM storage saves pins and enables a small package size.
The CHL8112A/B includes the CHiL Efficiency Shaping
Technology to deliver exceptional efficiency at minimum
cost across the entire load range. CHiL Variable Gate Drive
optimizes the MOSFET gate drive voltage as a function of
real-time load current. CHiL Dynamic Phase Control
adds/drops active phases based upon load current. The
CHL8112A/B can be configured to enter 1-phase operation
and active diode emulation mode automatically or by
command.
CHiL’s unique Adaptive Transient Algorithm (ATA), based
on proprietary non-linear digital PWM algorithms, minimizes
output bulk capacitors. In addition, a coupled inductor mode,
with phases added/dropped in pairs, enables further
improvement in transient response and form factor.
5-phase dual output PWM Controller
Phases are flexibly assigned between Loops 1 & 2
AMD® SVI/G34 & Memory MPoL modes
Dual OCP support for I-spike enhanced AMD CPUs
SMB_Alert Pin for Servers
PMBus Address pin or Variable Gate Drive (CHL8112A)
2nd Temperature Sense (CHL8112B)
Overclocking & Gaming Mode with Vmax setting
Switching frequency from 200kHz to 1.2MHz per phase
CHiL Efficiency Shaping Features including Variable
Gate Drive (CHL8112A only), Dynamic Phase Control
Programmable 1-phase or 2-phase for Light Loads and
Active Diode Emulation for Very Light Loads
CHiL Adaptive Transient Algorithm (ATA) on both loops
minimizes output bulk capacitors and system cost
Designed for use with coupled inductors
Auto-Phase Detection with auto-compensation
Per-Loop Fault Protection: OVP, UVP, OCP, OTP, CFP
I2C/SMBus/PMBus system interface for telemetry of
Temperature, Voltage, Current & Power for both loops
Non-Volatile Memory (NVM) for custom configuration
Compatible with CHiL ATL and 3.3V tri-state Drivers
+3.3V supply voltage; 0ºC to 85ºC ambient operation
Pb-Free, RoHS, 6x6 40 pin QFN package
PRODUCT BRIEF
DIGITAL MULTI-PHASE BUCK CONTROLLER
Page 1 of 2
VR_READY_L2
VR_READY
The I2C/PMBus interface can communicate with up to 16
CHL8112A/B based VR loops. Device configuration and
fault parameters are easily defined using the CHiL Intuitive
Power Designer (IPD) GUI and stored in on-chip NVM.
The CHL8112A/B provides extensive OVP, UVP, OCP and
OTP fault protection and includes thermistor based
temperature sensing with VRHOT signal.
The CHL8112A/B also includes numerous features like
register diagnostics for fast design cycles and platform
differentiation, truly simplifying VRD design and enabling
fastest time-to-market with its “set-and-forget” methodology.
APPLICATIONS
/ PWROK
PWRGD
RCSM
RCSP
VSEN
VRTN
RRES
TSEN
V18A
VCC
AMD® SVI based systems
DDR Memory with Vtt tracking
Overclocked & Gaming platforms
1
PRELIMINARY
2
1
2
Figure 1. CHL8112A & CHL8112B Packages
/
10
1
2
3
4
5
6
7
8
9
40
11
Notes
1
2
Pin definition in MPoL mode
Pin definition in AMD mode
39
12
38
13
© 2010 CHiL Semiconductor Corp. All rights reserved
40 Pin 6x6 QFN
CHL8112A/B
37
14
Top View
One Highwood Drive, Tewksbury, MA 01876
36
15
35
16
CHL8112A/B
34
17
41 GND
33
18
Tel: +1(978)-640-0011
32
19
www.chilsemi.com
31
20
30
29
28
27
26
25
24
23
22
21
RCSP_L2
RCSM_L2
VCC
VSEN_L2
VRTN_L2
PWM5
PWM4
PWM3
PWM2
PWM1
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CHL8112A-00CRT Summary of contents
Page 1
... Pb-Free, RoHS, 6x6 40 pin QFN package DESCRIPTION The CHL8112A/B are dual-loop digital multi-phase buck controllers that drive phases. The CHL8112A/B is fully AMD® SVI compliant on both loops and provides a Vtt tracking function for DDR memory. NVM storage saves pins and enables a small package size. ...
Page 2
... LVCC L PWM LoGate GND CHL8510 Boot HiGate Vcc HVCC Switch LVCC V_VGD PWM LoGate GND Optional Variable Gate Drive Circuit Tape & Reel Qty Part Number 3000 CHL8112A-00CRT 3000 CHL8112A-xxCRT 3000 CHL8112B-00CRT 3000 CHL8112B-xxCRT Rev. 0.04, August 25, 2010 PB0012 ...