IR3725MPBF International Rectifier, IR3725MPBF Datasheet - Page 5

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IR3725MPBF

Manufacturer Part Number
IR3725MPBF
Description
Input Power Monitor IC with Digital Interface
Manufacturer
International Rectifier
Datasheet

Specifications of IR3725MPBF

Package
12 Lead DFN
Bias Supply Voltage
+3.3V +/-5%
Junction Temperature
0oC to 125oC
Pbf
Yes
ADDR PIN
The ADDR pin is an input that establishes the serial
bus address. Valid addresses are selected by
grounding, floating, or wiring to VDD the ADDR pin.
Table 1, “User Selectable Addresses”, provides a
mapping of possible selections. Bypass this pin to
GND with a high quality ceramic capacitor when
floated.
Table 1 User selectable addresses
ADDR pin configuration
Low
Open
High
EXTCLK
This pin is a Schmitt trigger input for an optional
externally provided square wave clock. The duty ratio
of this externally provided clock, if used, shall be
between 40% and 60%. If no external clock is
connected, the internal clock will be used. Connect
this pin to GND if no external clock is used.
Page 5 of 19
Bus Address
b’1110 000
b’1110 010
b’1110 110
www.irf.com
SCL
SCL is the serial bus clock and is capable of
functioning with a rate as low as 10 kHz. It will
continue to function as the rate is increased to 400
kHz. This device is considered a slave, and therefore
uses the SCL as an input only.
SDA
SDA is monitored as data input during master to
slave transactions, and is driven as data output
during slave to master transactions as indicated in
the Packet Protocol section to follow.
IR3725
Data Sheet
2011_11_16

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