SG6742MR_ML Fairchild Semiconductor, SG6742MR_ML Datasheet - Page 3

no-image

SG6742MR_ML

Manufacturer Part Number
SG6742MR_ML
Description
The highly integrated SG6742ML/MR PWM controller provides several features to enhance the performance of flyback converters
Manufacturer
Fairchild Semiconductor
Datasheet
© 2008 Fairchild Semiconductor Corporation
SG6742ML/MR • Rev. 1.0.4
Marking Information
Pin Configuration
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
SENSE
Name
GATE
GND
VDD
NC
HV
FB
RT
ZXYTT
6742MR
TPM
Description
Ground.
The signal from the external compensation circuit is fed into this pin. The PWM duty cycle is
determined in response to the signal on this pin and the current-sense signal on the SENSE pin.
No connection.
For startup, this pin is pulled high to the line input or bulk capacitor via resistors.
For over-temperature protection, an external NTC thermistor is connected from this pin to the
GND pin. The impedance of the NTC decreases at high temperatures. Once the voltage of the
RT pin drops below a fixed limit, PWM output is latched.
Current sense. The sensed voltage is used for peak-current-mode control and cycle-by-cycle
current limiting.
Power supply. The internal protection circuit disables PWM output as long as V
OVP trigger point.
The totem-pole output driver. Soft driving waveform is implemented for improved EMI.
GND
NC
HV
FB
Figure 4. Pin Configuration (Top View)
Figure 3. Top Mark
1
2
3
4
ZXYTT
6742ML
TPM
SOP-8
3
8
7
6
5
SENSE
GATE
VDD
RT
F- Fairchild Logo
Z- Plant Code
X- 1 Digit Year Code
Y- 1 Digit week Code
TT: 2 Digits Die Run Code
T: Package Type (D=DIP, S=SOP)
P: Y: Green Package
M: Manufacture Flow Code
DD
exceeds the
www.fairchildsemi.com

Related parts for SG6742MR_ML