FSL206MRBN Fairchild Semiconductor, FSL206MRBN Datasheet - Page 3

• Manufacturer Part Number: FSL206MRBN
• Description: The FSL206MRBN integrated Pulse-Width Modulator (PWM) and SenseFET is specifically designed for high-performance offline Switched-Mode Power Supplies (SMPS) with minimal external components
• Manufacturer: Fairchild Semiconductor

© 2011 Fairchild Semiconductor Corporation
FSL206MRBN • Rev. 1.0.1
Pin Configuration
Pin Definitions
6, 7, 8
Pin #
1
2
3
4
5
Name
Drain
GND
V
V
V
LS
STR
CC
FB
Ground. SenseFET source terminal on primary side and internal control ground.
Positive Supply Voltage Input. Although connected to an auxiliary transformer winding,
current is supplied from pin 5 (V
Diagram section). It is not until V
startup switch opens and device power is supplied via the auxiliary transformer winding.
Feedback Voltage. Non-inverting input to the PWM comparator, with a 0.11mA current source
connected internally and a capacitor and opto-coupler typically connected externally. There is a
delay while charging external capacitor C
source. This delay prevents false triggering under transient conditions, but allows the protection
mechanism to operate under true overload conditions.
Line Sense Pin. This pin is used to protect the device when the input voltage is lower than the
rated input voltage range. If this pin is not used, connect to ground.
Startup. Connected to the rectified AC line voltage source. At startup, the internal switch
supplies internal bias and charges an external storage capacitor placed between the V
and ground. Once V
voltage regulator (HV REG) turns on and off irregularly to maintain V
Drain. Designed to connect directly to the primary lead of the transformer and capable of
switching a maximum of 650V. Minimizing the length of the trace connecting these pins to the
transformer decreases leakage inductance.
GND
CC
V
V
LS
Figure 24. Pin Configuration
CC
FB
reaches 8V, all internal blocks are activated. After that, the internal high-
STR
CC
8-DIP
) via an internal switch during startup (see Internal Block
reaches the UVLO upper threshold (8V) that the internal
3
FB
Description
from 2.4V to 5V using an internal 2.7μA current
Drain
Drain
Drain
V
STR
CC
at 7.8V.
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CC
pin