FAN8303 Fairchild Semiconductor, FAN8303 Datasheet - Page 9

• Manufacturer Part Number: FAN8303
• Description: The FAN8303 is a monolithic, non-synchronous, stepdown (buck) regulator with internal power MOSFETs
• Manufacturer: Fairchild Semiconductor

© 2008 Fairchild Semiconductor Corporation
FAN8303 • Rev. 1.0.0
Soft-Start
A capacitor, C
GND helps control the rate of rise on the output voltage.
When EN is HIGH and V
a trimmed bias current charges the capacitor connected
to the SS pin, causing the voltage to rise.
The time it takes this voltage to reach 0.6V and the
PWM output to reach regulation is given by:
Loop Compensation
The goal of the compensation design is to shape the
converter frequency response to achieve high DC gain
and fast transient, while maintaining loop stability.
FAN8303 employs peak current-mode control for fast
transient response and to help simplify the loop to a
one-pole and one-zero system.
The system pole is calculated by the equation:
The system zero is due to the output capacitor and its
ESR system zero is calculated by following equation:
The characteristics of the control system are controlled
by a series capacitor and resistor network connected to
the COMP pin to set the pole and zero.
The pole is calculated by the following equation:
where:
G
A
C
Zero is due to the compensation capacitor (C
resistor (R
where R
where C
where R
t
f
f
f
f
P
VEA
RISE
z
p
C
EA
z
1
1
2
2
is the compensation capacitor.
=
=
=
is the error amplifier transconductance (380µA/V);
=
is the error amplifier voltage gain (400V/V); and
(
2
2
2
ms
π
π
2
π
π
⋅
⋅
C
C
)
⋅
C
SS
L
C
⋅
≈
OUT
G
is compensation resistor.
OUT
C
C
is the load resistor value (V
1
C
0
1
EA
) calculated by the following equation:
is in nF.
1
C
1 .
⋅
A
⋅
⋅
⋅
•
ESR
R
VEA
R
C
SS
L
C
SS
, connected between the SS pin and
IN
is within the operating range,
OUT
/I
OUT
).
C
) and
(5)
(6)
(7)
(8)
(9)
9
The system crossover frequency (f
loop has unity gain, is recommended for setting the
1/10th of switching frequency. Generally, higher f
means faster response to load transients, but can result
in instability if not properly compensated.
The first step of the compensation design is choosing
the compensation resistor (R
frequency by the following equation:
where V
sense gain, which is roughly the output current divided
by the voltage at COMP (2A/V).
The next step is choosing the compensation capacitor
(C
applications with typical inductor values, setting the
compensation zero, f
crossover frequency provides sufficient phase margin.
Determine the (C
Determine if the second compensation capacitor (C
required. It is required if the ESR zero of the output
capacitor is located at less than half of the switching
frequency.
If required, add the second compensation capacitor
(C
Determine the (C
C
C
R
2
π
C
A
A
C
C
) to achieve the desired phase margin. For
) to set the pole f
⋅
=
C
=
=
modulator
OUT
C
Figure 16.
π
2
OUT
1
PWM
π
FB
⋅
G
R
R
⋅
⋅
FAN8303
ESR
C
CS
C
COMP
2
⋅
C
is reference voltage and G
ESR
OUT
C
R
⋅
C
⋅
f
C
G
C
<
EA
⋅
f
2
C
S
A
f
C
) value by the following equation:
) value by the equation:
⋅
Block Diagram of Compensation
V
⋅
V
P3
FB
OUT
Z2
at the location of the ESR zero.
+
_
C
, to below one fourth of the
A
0.6V
C
SW
FB
) to set the crossover
C
), where the control
CS
is the current
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V
O
(10)
(11)
(12)
(13)
A
) is
C