FAN3100T Fairchild Semiconductor, FAN3100T Datasheet - Page 17

• Manufacturer Part Number: FAN3100T
• Description: The FAN3100 2A gate driver is designed to drive an N-channel enhancement-mode MOSFET in low-side switching applications by providing high peak current pulses during the short switching intervals
• Manufacturer: Fairchild Semiconductor

© 2007 Fairchild Semiconductor Corporation
FAN3100 • Rev. 1.0.3
Operational Waveforms
At power up, the driver output remains low until the V
voltage reaches the turn-on threshold. The magnitude of
the OUT pulses rises with V
reached. The non-inverting operation illustrated in
Figure 47 shows that the output remains low until the
UVLO threshold is reached, then the output is in-phase
with the input.
For the inverting configuration of Figure 46, start-up
waveforms are shown in Figure 48. With IN+ tied to
VDD and the input signal applied to IN–, the OUT pulses
are inverted with respect to the input. At power up, the
inverted output remains low until the V
reaches the turn-on threshold, then it follows the input
with inverted phase.
Thermal Guidelines
Gate drivers used to switch MOSFETs and IGBTs at
high frequencies can dissipate significant amounts of
power. It is important to determine the driver power
dissipation and the resulting junction temperature in the
application to ensure that the part is operating within
acceptable temperature limits.
The total power dissipation in a gate driver is the sum of
two components; P
Figure 47. Non-Inverting Start-Up Waveforms
P
Gate Driving Loss: The most significant power loss
results from supplying gate current (charge per unit
time) to switch the load MOSFET on and off at the
switching frequency. The power dissipation that
results from driving a MOSFET at a specified gate-
TOTAL
Figure 48. Inverting Start-Up Waveforms
= P
GATE
GATE
+ P
DYNAMIC
and P
DD
DYNAMIC
until steady-state V
:
DD
voltage
DD
(1)
DD
is
17
Once the power dissipated in the driver is determined,
the driver junction rise with respect to circuit board can
be evaluated using the following thermal equation,
assuming 
design (heat sinking and air flow):
In a typical forward converter application with 48V input,
as shown in Figure 49, the FDS2672 would be a
potential MOSFET selection. The typical gate charge
would be 32nC with V
driver at a switching frequency of 500kHz, the total
power dissipation can be calculated as:
The 5-pin SOT23 has a junction-to-lead thermal
characterization parameter 
In a system application, the localized temperature
around the device is a function of the layout and
construction of the PCB along with airflow across the
surfaces. To ensure reliable operation, the maximum
junction temperature of the device must be prevented
from exceeding the maximum rating of 150°C; with 80%
derating, T
Equation 4 determines the board temperature required
to maintain the junction temperature below 120°C:
For comparison purposes, replace the 5-pin SOT23
used in the previous example with the 6-pin MLP
package with 
can operate at a PCB temperature of 119°C, while
maintaining the junction temperature below 120°C. This
illustrates that the physically smaller MLP package with
thermal pad offers a more conductive path to remove
the heat from the driver. Consider the tradeoffs between
reducing overall circuit size with junction temperature
reduction for increased reliability.
T

T
source voltage, V
switching frequency, f
P
Dynamic Pre-drive / Shoot-through Current: A power
loss resulting from internal current consumption
under dynamic operating conditions, including pin
pull-up / pull-down resistors, can be obtained using
the I
Performance Characteristics to determine the
current I
operating conditions:
P
T
where:
T
T
P
P
P
J
JB
B
GATE
DYNAMIC
J
B,MAX
B,MAX
GATE
DYNAMIC
TOTAL
= P
= driver junction temperature
= (psi) thermal characterization parameter
= board temperature in location defined in the
DD
= Q
= 32nC • 10V • 500kHz = 0.160W
= T
= 120°C – 0.24W • 51°C/W = 108°C
relating temperature rise to total power
dissipation
Thermal Characteristics table.
= 0.24W
J
(no-Load) vs. Frequency graphs in Typical
TOTAL
JB
= I
= 8mA • 10V = 0.080W
would be limited to 120°C. Rearranging
DYNAMIC
G
J
was determined for a similar thermal
- P
JB
DYNAMIC
• V
• 
TOTAL
= 2.8°C/W. The 6-pin MLP package
GS
JB
GS
• F
drawn from V
+ T
• V
GS
• 
SW
= V
, with gate charge, Q
SW
DD
B
JB
DD
, is determined by:
JB
= 10V. Using a TTL input
= 51°C/W.
DD
under actual
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