FAN2560 Fairchild Semiconductor, FAN2560 Datasheet - Page 2

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FAN2560

Manufacturer Part Number
FAN2560
Description
The FAN2560 is a linear low-dropout (LDO) regulator with a split-supply architecture
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2006 Fairchild Semiconductor Corporation
FAN2560 • Rev. 1.0.1
Block Diagram
Pin Configuration
Pin Definitions
Pin #
A1
A3
C1
C3
B2
Name
VOUT
VBAT
GND
VIN
EN
Description
Power supply input. A minimum 1μF MLCC is required to GND.
Output Voltage. A typical C
V
Battery bias supply input. No capacitor is required unless another bulk capacitor is more than
few inches away.
Enable input. The device is in shutdown mode when the voltage at this pin is <0.4V and
enabled when >1.1V. The EN latches the LOW logic state once externally forced. Do not leave
this pin floating when the device is turned ON.
Ground pin. Connect to a PCB GND plane.
OUT
VBAT
GND
terminal.
VIN
TOP VIEW
C1
A1
B2
Figure 4. 0.96 x 1.33mm WLCSP package
A3
C3
VOUT
EN
Figure 3. IC Block Diagram
OUT
=1μF to 2.2μF MLCC is required to GND, placed close to the
2
VOUT
EN
BOTTOM VIEW
C3
A3
B2
A1
C1
VIN
GND
VBAT
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