FCM8202 Fairchild Semiconductor, FCM8202 Datasheet - Page 10

• Manufacturer Part Number: FCM8202
• Manufacturer: Fairchild Semiconductor

© 2011 Fairchild Semiconductor Corporation
FCM8202 • Rev. 1.0.1
Functional Description
Power Management and Regulator
FCM8202 can operate in a wide input voltage (V
range from 10V to 17.5V. The VOUT pin is the output
terminal of an internal voltage regulator. The typical
output voltage ranges from 5.0V to 5.2V. To stabilize the
VOUT circuit, an external capacitor must be connected
closely between this terminal and the ground. If the V
voltage is lower than the 8V threshold, the FCM8202 is
shut down and the internal registers are reset.
Clock Generator
FCM8202 comes with a programmable oscillator. Being
determined by an externally added resistor, the system
clock, R_CLK, can be programmed from 960KHz to
1920KHz. The switching frequency of the PWM signal is
equal to 1/64 (divided by 64) of the system clock.
Therefore, when the system clock is configured as
960KHz, PWM is 960KHz / 64 = 15KHz. Similarly, if a
20KHz PWM is intended, the system clock should be set
as 1.28MHz.
PWM Commutation
FCM8202 supports both square-wave PWM and sine-
wave PWM for the BLDC motor control. The controller
comes with the Hall-sensor design used to align the
rotor position of the motor. For Square-Wave Mode, the
PWM output commutation is shown at Table 1.
Table 1. Square Wave Commutation
Note:
1.
2.
CW
X
X
P= PWM, Pb= PWM inverse.
X= don’t care.
1
1
1
1
1
1
0
0
0
0
0
0
Hall
000
111
001
011
010
110
100
101
101
100
110
010
011
001
Hall
0
7
1
3
2
6
4
5
5
4
6
2
3
1
U-V-W
P-0-0
0-0-P
0-0-P
0-P-0
0-P-0
P-0-0
0-0-P
0-0-P
P-0-0
P-0-0
0-P-0
0-P-0
0-0-0
0-0-0
Pb-1-0
0-1-Pb
1-0-Pb
1-Pb-0
0-Pb-1
Pb-0-1
1-0-Pb
0-1-Pb
Pb-1-0
Pb-0-1
0-Pb-1
1-Pb-0
X-Y-Z
0-0-0
0-0-0
PP
PP
)
10
HALL Signals Input
FCM8202 provides a 3~6µs debounce time for each
Hall signal input to reduce the glitch of the Hall signals.
When the transition of the Hall signal is slow, a glitch
might be produced and an error follow. Through a built-
in Hall signal debounce circuit, FCM8202 minimizes the
risk of the glitches and related errors.
PWM Duty Cycle and Operation
The PWM duty is proportional to the voltage levels on
the OPO pin and DUTY pin. A FREE/nST pin is utilized
to enable the PWM signals. When FREE/nST pin is set
as logic HIGH, the PWM state is in Free Mode and all
PWM outputs (U, V, W, X, Y, Z pins) are logic LOW.
Once the FREE/nST pin goes logic LOW, the FCM8202
starts operating the PWM.
Sine-Wave Generator
FCM8202 includes space vector modulation (SVM) for
the sine-wave PWM. An angle-detect circuit phase-locks
the rotor position using the Hall signals of the motor.
The resolution is 32 steps per 60°. Through the PWM
operation, the motor current of each phase is sine-wave.
The angle shift between each phase is 120°.
Figure 17. Sine-Wave Output at CW=1
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