TLE 8264E Infineon Technologies, TLE 8264E Datasheet - Page 43
TLE 8264E
Manufacturer Part Number
TLE 8264E
Description
Manufacturer
Infineon Technologies
Datasheet
1.TLE_8264E.pdf
(99 pages)
Specifications of TLE 8264E
Packages
PG-DSO-36
Transceiver
High Speed CAN ISO 11898 - 5 / 3 x LIN2.1 / J2602
Voltage Regulator Output
2 x 200 mA + 400 mA
Watchdog
Standard and Window Watchdog
Quiescent Current (max.)
28 ?A (typ) Sleep Mode (5V on)
Standby Current
58 ?A (typ) Stop Mode (5V on)
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Figure 19
9.2.1
The SBC can not be sent from Normal Mode to Sleep Mode with uncleared interrupt in the WK interrupt bits “WK
0 WK pin” and “WK 1 WK pin”. This is implemented to avoid that a wake information from the WK pin gets lost
during the transition from Normal to Sleep Mode. If a wake up appears during the µC sets the SBC to Sleep Mode,
the SBC will wake up directly after going to Sleep Mode. There is no difference if the bits “WK 0 WK pin” or “WK
1 WK pin” bit were set during the transition or were just not cleared before sending the SPI command for Sleep
Mode, the SBC will wake-up after entering the Sleep Mode. Therefore it always needs to be ensured that the bits
are cleared before sending the SBC to Sleep Mode.
Data Sheet
Wake-up Timing
Transition from Normal to Sleep Mode.
V
WK
V
WK,th
No Wake Event
t
WK,f
43
t
WK,f
V
WK,th
Wake Event
Rev. 1.0, 2009-03-31
Wake Pin Diagram .vsd
t
TLE8264E
WK Pin
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