TLE 7810G Infineon Technologies, TLE 7810G Datasheet - Page 26

• Manufacturer Part Number: TLE 7810G
• Manufacturer: Infineon Technologies

Specifications of TLE 7810G

• Packages: PG-DSO-28
• Flash: 16.0 kByte
• Frequency (f): 24.0 MHz
• High Side Switch: 1
• High Voltage Monitor Input: 5
• Gpio: 8

9
The SBC provides three different resets:
•
•
•
Should the internal supply voltage become lower than the internal threshold the
order to indicate the undervoltage condition (
V
pre-setting routine of the microcontroller has to be started.
When the
the reset output is switched LOW and will be released after a programmable delay time (default setting for Power-
On-Reset) when
switched on after Power-On-Reset. As soon as an undervoltage condition of the output voltage (
appears, the reset output is switched LOW again (
Please refer to
Table 11
Affected by Reset
Reset Pin
Watchdog Timer
Operating Mode
LS-Switches
Supply Output
HS-LED
Configuration Settings
After the above described delayed reset (LOW to HIGH transition at RESET pin) the window watchdog circuit is
started by opening a long open window in SBC Standby Mode. The long open window allows the microcontroller
to run its initialization sequences and then to trigger the watchdog via the SPI. Within the long open window period
a watchdog trigger is detected as a write access to the “window watchdog period bit field” within the SPI control
word. The trigger is accepted when the CSN input becomes HIGH after the transmission of the SPI word.
A correct watchdog trigger results in starting the window watchdog by opening a closed window with a width of
50% of the selected window watchdog period. This period, selected via the SPI window watchdog timing bit field,
is programmable in a wide range. The closed window is followed by an open window with a width of 50% of the
selected period. The microcontroller has to service the watchdog by periodically writing to the window watchdog
timing bit field. This write access has to meet the open window. A correct watchdog service immediately results in
starting the next closed window.
Should the trigger signal not meet the open window a watchdog reset is generated by setting the reset output low.
Then the watchdog again starts by opening a long open window. In addition, a “window watchdog reset flag” is set
within the SPI to monitor a watchdog reset. For fail safe reasons the TLE7810G is automatically switched to SBC
Standby mode if a watchdog trigger failure occurs. This minimizes the power consumption in case of a permanent
faulty microcontroller. This “window watchdog reset flag” will be cleared by any access to the SPI.
When entering a low power mode the watchdog can be requested to be enabled via an SPI bit. In SBC Stop Mode
the watchdog is only turned off once the current consumption at
Data Sheet
INT
V
V
Watchdog: reset of SBC caused by integrated window watchdog
-Fail feature can also be used to give an indication that the system supply was disconnected and therefore a
INT
CC
-UV: reset of SBC upon undervoltage detection at supply voltage (
-UV: reset of SBC upon undervoltage detection at internal supply voltage
V
CC
Reset Behavior and Window Watchdog
Reset Behavior SBC
voltage falls below the reset threshold voltage
Figure
V
CC
>
17.
V
RTx
. This is necessary for a defined start of the microcontroller when the application is
V
“low”
long open window
SBC Standby
“off”
“off”
“off”
Reset (“all bits cleared”)
INT
-UV
V
INT
-UV). All other SPI settings are also reset by this condition. The
V
CC
26
-UV). The reset delay time can be shortened via SPI bit.
V
RTx
V
“low”
long open window
SBC Standby
“off”
“off”
“off”
see
Word” on Page 20
V
CC
CC
for a time duration longer than the filter time t
-UV or Watchdog-Reset
Figure 10 “16-Bit SPI Input Data / Control
falls below the “watchdog current threshold”.
Reset Behavior and Window Watchdog
V
CC
)
V
INT
-Fail SPI bit will be reset in
Rev. 3.01, 2008-04-15
TLE7810G
V
CC
<
V
RTx
RR
)