BTS 5562E Infineon Technologies, BTS 5562E Datasheet - Page 37

• Manufacturer Part Number: BTS 5562E
• Manufacturer: Infineon Technologies

Specifications of BTS 5562E

• Packages: PG-DSO-36
• Channels: 5.0
• Channel Mix: 3x50mohm+2*130mohm
• Led Mode: No
• Cranking Mode: No
• Pwm Engine Integrated: No

SO Serial Output:
Data is shifted out serially at this pin, the most significant bit first. SO is in high impedance state until the CS pin
goes to low state. New data will appear at the SO pin following the rising edge of SCLK. Please refer to
for further information.
9.2
The SPI of SPOC - BTS5562E provides daisy chain capability. In this configuration several devices are activated
by the same CS signal MCS. The SI line of one device is connected with the SO line of another device (see
Figure
device, MO and MI respectively. The master device provides the master clock MCLK which is connected to the
SCLK line of each device in the chain.
Figure 18
In the SPI block of each device, there is one shift register where one bit from SI line is shifted in each SCLK. The
bit shifted out occurs at the SO pin. After eight SCLK cycles, the data transfer for one device has been finished.
In single chip configuration, the CS line must turn high to make the device accept the transferred data. In daisy
chain configuration, the data shifted out at device 1 has been shifted in to device 2. When using three devices in
daisy chain, three times eight bits have to be shifted through the devices. After that, the MCS line must turn high
(see
Figure 19
Data Sheet
Figure
MCLK
18), in order to build a chain. The ends of the chain are connected with the output and input of the master
MCLK
MCS
MO
MCS
time
MI
MO
MI
19).
Daisy Chain Capability
Daisy Chain Configuration
Data Transfer in Daisy Chain Configuration
SO device 3
SI device 3
SI
device 1
SPI
SO
SO device 2
SI device 2
SI
37
device 2
SPI
SO
SO device 1
SI device 1
SI
Serial Peripheral Interface (SPI)
device 3
SPI
SPOC - BTS5562E
SPI_DasyChain2.emf
Rev. 1.0, 2008-05-15
SPI_DaisyChain .emf
SO
Section 9.5