NC7SZ125P5X Fairchild Semiconductor, NC7SZ125P5X Datasheet - Page 5
NC7SZ125P5X
Manufacturer Part Number
NC7SZ125P5X
Description
IC BUFF TRI-ST UHS N-INV SC705
Manufacturer
Fairchild Semiconductor
Series
7SZr
Datasheet
1.NC7SZ125M5X.pdf
(10 pages)
Specifications of NC7SZ125P5X
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
1
Number Of Bits Per Element
1
Current - Output High, Low
32mA, 32mA
Voltage - Supply
1.65 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
SC-70-5, SC-88A, SOT-323-5, SOT-353, 5-TSSOP
Logic Family
NC7SZ
Number Of Channels Per Chip
Single
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
85 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Input Bias Current (max)
2 uA
Low Level Output Current
32 mA
Maximum Power Dissipation
150 mW
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
1
Output Type
3-State
Propagation Delay Time
5.7 ns @ 3.3 V or 5 ns @ 5 V
Logic Device Type
Buffer, Non Inverting
Supply Voltage Range
1.65V To 5.5V
Logic Case Style
SC-70
No. Of Pins
5
Operating Temperature Range
-40°C To +85°C
Family Type
7SZ
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
NC7SZ125P5XTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
NC7SZ125P5X
Manufacturer:
FSC
Quantity:
583 000
Company:
Part Number:
NC7SZ125P5X
Manufacturer:
FAIRCHILD
Quantity:
8 500
Company:
Part Number:
NC7SZ125P5X
Manufacturer:
FAIRCHILD
Quantity:
55 018
Part Number:
NC7SZ125P5X
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
© 1996 Fairchild Semiconductor Corporation
NC7SZ125 • Rev. 1.0.4
AC Electrical Characteristics
Note:
2.
Note:
3.
Note:
4.
Symbol
t
t
t
PLH,
PZL,
PLZ,
C
C
C
OUT
PD
t
t
IN
C
current consumption (I
operating current by the expression: I
C
Input PRR=1.0MHz, t
Input=AC Waveform; t
PRR=10MHz; Duty Cycle=50%.
t
PZH
PHZ
PHL
PD
L
includes load and stray capacitance.
is defined as the value of the internal equivalent capacitance which is derived from dynamic operating
Propagation Delay
Output Enable Time
Output Disable Time
Input Capacitance
Output Capacitance
Power Dissipation
Capacitance
Parameter
Figure 5. I
Figure 4. AC Test Circuit
(2)
W
CCD
r
CCD
=500ns.
=t
f
=1.8ns;
Test Circuit
) at no output lading and operating at 50% duty cycle. C
2.50 ± 0.20
3.30 ± 0.30
5.00 ± 0.50
3.30 ± 0.30 C
5.00 ± 0.50
2.50 ± 0.20
3.30 ± 0.30
5.00 ± 0.50
2.50 ± 0.20
3.30 ± 0.30
5.00 ± 0.50
1.65
1.80
1.65
1.80
1.65
1.80
0.00
0.00
3.30
5.00
V
CC
CCD
C
R
S
R
S
C
R
RU=500Ω
S
S
V
C
R
RU=500Ω
S
S
V
L
D
1
L
D
1
L
D
1
1
IN
L
D
1
1
IN
=(C
Conditions
=OPEN
=OPEN
=GND for t
=V
=GND for t
=V
=15pF,
=50pF,
=50pF,
=50pF,
=1MΩ
=500Ω
=500Ω
=500Ω
=2•V
=2•V
IN
IN
PD
for t
for t
CC
CC
)(V
PZL
PLZ
CC
PZH
PHZ
)(f
5
IN
)+(I
Min. Typ. Max.
2.0
2.0
0.8
0.5
0.5
1.5
0.8
2.0
2.0
1.5
1.5
0.8
2.0
2.0
1.5
1.0
0.5
CC
static).
T
A
=+25°C
6.4
5.3
3.4
2.5
2.1
3.2
2.6
8.4
7.0
4.6
3.5
2.8
6.5
5.4
3.5
2.8
2.1
17
24
8
4
Figure 6. AC Waveforms
13.2
11.0
15.0
12.5
13.2
11.0
7.5
5.2
4.5
5.7
5.0
8.5
6.2
5.5
8.0
5.7
4.7
T
Min.
A
2.0
2.0
0.8
0.5
0.5
1.5
0.8
2.0
2.0
1.5
1.5
0.8
2.0
2.0
1.5
1.0
0.5
=-40 to +85°C
PD
is related to I
Max.
13.8
11.5
15.6
13.0
14.5
12.0
8.0
5.5
4.8
6.0
5.3
9.0
6.5
5.8
8.5
6.0
5.0
Units Figure
CCD
pF
pF
ns
ns
www.fairchildsemi.com
dynamic
Figure 4
Figure 6
Figure 4
Figure 6
Figure 5