74LVT162244MTDX Fairchild Semiconductor, 74LVT162244MTDX Datasheet - Page 5

IC BUFF DVR TRI-ST 16BIT 48TSSOP

74LVT162244MTDX

Manufacturer Part Number
74LVT162244MTDX
Description
IC BUFF DVR TRI-ST 16BIT 48TSSOP
Manufacturer
Fairchild Semiconductor
Series
74LVTr
Datasheet

Specifications of 74LVT162244MTDX

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
4
Current - Output High, Low
12mA, 12mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Logic Family
LVT
Number Of Channels Per Chip
16
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
High Level Output Current
- 12 mA
Low Level Output Current
12 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
16 / 16
Output Type
3-State
Propagation Delay Time
4.8 ns at 2.7 V, 4 ns at 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
V
V
t
t
t
t
t
t
t
t
C
C
I
'
PLH
PHL
PZH
PZL
PHZ
PLZ
OSHL
OSLH
DC Electrical Characteristics
CCZ
Note 5: Applies to bushold versions only (74LVTH162244).
Note 6: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 8: This is the increase in supply current for each input that is at the specified voltage level rather than V
Dynamic Switching Characteristics
Note 9: Characterized in SSOP package. Guaranteed parameter, but not tested.
Note 10: Max number of outputs defined as (n). n
AC Electrical Characteristics
Note 11: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
Capacitance
Note 12: Capacitance is measured at frequency f
OLP
OLV
I
Symbol
IN
OUT
Symbol
Symbol
CC

Symbol
Quiet Output Maximum Dynamic V
Quiet Output Minimum Dynamic V
Propagation Delay Data to Output
Output Enable Time
Output Disable Time
Output to Output Skew
(Note 11)
Power Supply Current
Increase in Power Supply Current
(Note 8)
Input Capacitance
Output Capacitance
Parameter
(Note 12)
Parameter
Parameter
Parameter

OL
1 data inputs are driven 0V to 3V. Output under test held LOW.
OL
1 MHz, per MIL-STD-883, Method 3012.
V
(V)
3.3
3.3
CC
V
V
(Continued)
CC
CC
0V, V
3.0V, V
V
(V)
3.6
3.6
Min
CC
I
(Note 9)
5
O
0V or V
Min
1.4
1.2
1.2
1.4
2.0
1.5
V
Conditions
CC
0V or V
T
A
T
T
A
A
3.3V
CC
Min


Typ
0.8
0.8
40
OSHL
CC
25

q
40
r
q
C to
C
) or LOW-to-HIGH (t
0.3V
q
Max
C to
4.0
3.7
5.1
5.4
5.0
5.0
1.0

85

Max
0.19
Max
0.2
q
85
C, C
q
C
CC
L
or GND.
50 pF, R
Min
1.4
1.2
1.2
1.4
2.0
1.5
OSLH
Units
Units
mA
mA
V
V
V
).
CC
Typical
L
4
8
2.7V
500
V
Outputs Disabled
One Input at V
Other Inputs at V
CC
:
C
www.fairchildsemi.com
Max
4.8
4.1
6.5
6.9
5.4
5.4
1.0
d
L
V
O
Conditions
50 pF, R
Conditions
d
(Note 10)
(Note 10)
5.5V,
CC
CC
L
Units

pF
pF
Units
0.6V
or GND
ns
ns
ns
ns
500
:

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