HY29F800ABT-70 Hynix Semiconductor, HY29F800ABT-70 Datasheet

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HY29F800ABT-70

Manufacturer Part Number
HY29F800ABT-70
Description
Manufacturer
Hynix Semiconductor
Datasheets
KEY FEATURES
n 5 Volt Read, Program, and Erase
n High Performance
n Low Power Consumption
n Compatible with JEDEC Standards
n Sector Erase Architecture
n Erase Suspend/Resume
GENERAL DESCRIPTION
The HY29F800A is an 8 Megabit, 5 volt only CMOS
Flash memory organized as 1,048,576 (1M) bytes
or 524,288 (512K) words. The device is offered in
industry-standard 44-pin PSOP and 48-pin TSOP
packages.
The HY29F800A can be programmed and erased
in-system with a single 5-volt V
generated and regulated voltages are provided for
program and erase operations, so that the device
does not require a high voltage power supply to
perform those functions. The device can also be
programmed in standard EPROM programmers.
Access times as fast as 55 ns over the full operat-
ing voltage range of 5.0 volts ± 10% are offered for
timing compatibility with the zero wait state require-
ments of high speed microprocessors. A 50 ns
Preliminary
Revision 1.1, February 2002
– Minimizes system-level power requirements
– Access times as fast as 50 ns
– 20 mA typical active read current in byte
– 35 mA typical program/erase current
– 5 µA maximum CMOS standby current
– Package, pinout and command-set
– Provides superior inadvertent write
– Boot sector architecture with top and
– One 16 Kbyte, two 8 Kbyte, one 32 Kbyte
– One 8 Kword, two 4 Kword, one 16 Kword
– A command can erase any combination of
– Supports full chip erase
– Temporarily suspends a sector erase
mode, 28 mA typical in word mode
compatible with the single-supply Flash
device standard
protection
bottom boot block options available
and fifteen 64 Kbyte sectors in byte mode
and fifteen 32 Kword sectors in word mode
sectors
operation to allow data to be read from, or
programmed into, any sector not being
erased
CC
supply. Internally
8 Megabit (1Mx8/512Kx16), 5 Volt-only, Flash Memory
n Sector Protection
n Temporary Sector Unprotect
n Internal Erase Algorithm
n Internal Programming Algorithm
n Fast Program and Erase Times
n Data# Polling and Toggle Status Bits
n Ready/Busy# Output (RY/BY#)
n Minimum 100,000 Program/Erase Cycles
n Space Efficient Packaging
LOGIC DIAGRAM
– Any combination of sectors may be locked
– Allows changes in locked sectors
– Automatically erases a sector, any
– Automatically programs and verifies data
– Byte programming time: 7 µs typical
– Sector erase time: 1.0 sec typical
– Chip erase time: 19 sec typical
– Provide software confirmation of
– Provides hardware confirmation of
– Available in industry-standard 44-pin
19
to prevent program or erase operations
within those sectors
(requires high voltage on RESET# pin)
combination of sectors, or the entire chip
at a specified address
completion of program or erase
operations
completion of program and erase
operations
PSOP and 48-pin TSOP and reverse
TSOP packages
A[18:0]
C E #
O E #
W E #
R E S E T #
B Y T E #
DQ[15]/A-1
DQ[14:8]
RY/BY#
DQ[7:0]
HY29F800A
8
7

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