IDT74FCT3244PGG8 IDT, Integrated Device Technology Inc, IDT74FCT3244PGG8 Datasheet - Page 5

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IDT74FCT3244PGG8

Manufacturer Part Number
IDT74FCT3244PGG8
Description
IC BUFF/DVR DUAL N-INV 20TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
74FCTr
Datasheet

Specifications of IDT74FCT3244PGG8

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
4
Current - Output High, Low
8mA, 24mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74FCT3244PGG8
TEST CIRCUITS AND WAVEFORMS
ASYNCHRONOUS CONTROL
SYNCHRONOUS CONTROL
IDT74FCT3244/A
3.3V CMOS OCTAL BUFFER/LINE DRIVER
Generator
INPUT TRANSITION
INPUT TRANSITION
Pulse
OPPOSITE PHASE
CLOCK ENABLE
SAME PHASE
PRESET
PRESET
TIMING
V
CLEAR
CLEAR
OUTPUT
INPUT
IN
INPUT
DATA
ETC.
ETC.
Set-Up, Hold, and Release Times
Test Circuits for All Outputs
R
T
Propagation Delay
D.U.T.
V
t
PLH
t
CC
PLH
t
t
SU
SU
V
OUT
t
REM
C
t
t
t
50pF
H
PHL
PHL
L
t
H
500Ω
500Ω
3V
1.5V
0V
V
1.5V
V
3V
1.5V
0V
OH
OL
Open
GND
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
6v
5
SWITCH POSITION
DEFINITIONS:
C
R
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; Z
3. If Vcc is below 3V, input voltage swings should be adjusted not to exceed Vcc.
NORMALLY
L
T
NORMALLY
CONTROL
= Load capacitance: includes jig and probe capacitance.
= Termination resistance: should be equal to Z
HIGH-LOW-HIGH
LOW-HIGH-LOW
OUTPUT
OUTPUT
INPUT
HIGH
LOW
All Other Tests
Disable High
Disable Low
Enable High
Enable Low
Open Drain
Test
PULSE
PULSE
SWITCH
SWITCH
GND
ENABLE
6V
t
t
PZH
PZL
Enable and Disable Times
Pulse Width
1.5V
1.5V
3V
0V
INDUSTRIAL TEMPERATURE RANGE
t
PHZ
t
W
OUT
DISABLE
O
t
of the Pulse Generator.
PLZ
≤ 50Ω; t
Switch
GND
Open
0.3V
0.3V
6V
F
≤ 2.5ns; t
3V
1.5V
0V
3V
V
V
0V
OL
OH
1.5V
1.5V
R
≤ 2.5ns.

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