M25P128 Numonyx, B.V., M25P128 Datasheet - Page 21
![no-image](/images/no-image-200.jpg)
M25P128
Manufacturer Part Number
M25P128
Description
128 Mbit (Multilevel), low-voltage, Serial Flash memory with 50-MHz SPI bus interface
Manufacturer
Numonyx, B.V.
Datasheet
1.M25P128.pdf
(45 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M25P128
Manufacturer:
ST
Quantity:
20 000
Part Number:
M25P128-VME6
Manufacturer:
MICRON/镁光
Quantity:
20 000
Part Number:
M25P128-VME6G
Manufacturer:
MICRON/镁光
Quantity:
20 000
Company:
Part Number:
M25P128-VME6GB
Manufacturer:
NUMONYX
Quantity:
1 920
Company:
Part Number:
M25P128-VME6GB
Manufacturer:
SILICON
Quantity:
2 310
Part Number:
M25P128-VME6GB
Manufacturer:
ST
Quantity:
20 000
Part Number:
M25P128-VME6TG
Manufacturer:
MICRON/美光
Quantity:
20 000
Company:
Part Number:
M25P128-VME6TGB
Manufacturer:
BOURNS
Quantity:
550 000
Company:
Part Number:
M25P128-VME6TGB
Manufacturer:
NUMONYX
Quantity:
8 000
M25P128
6.3
Read Identification (RDID)
The Read Identification (RDID) instruction allows the 8-bit manufacturer identification to be
read, followed by two bytes of device identification. The manufacturer identification is
assigned by JEDEC, and has the value 20h for Numonyx. The device identification is
assigned by the device manufacturer, and indicates the memory type in the first byte (20h),
and the memory capacity of the device in the second byte (18h).
Any Read Identification (RDID) instruction while an Erase or Program cycle is in progress, is
not decoded, and has no effect on the cycle that is in progress.
The device is first selected by driving Chip Select (S) Low. Then, the 8-bit instruction code
for the instruction is shifted in. This is followed by the 24-bit device identification, stored in
the memory, being shifted out on Serial Data Output (Q), each bit being shifted out during
the falling edge of Serial Clock (C).
The instruction sequence is shown in
The Read Identification (RDID) instruction is terminated by driving Chip Select (S) High at
any time during data output.
When Chip Select (S) is driven High, the device is put in the Standby Power mode. Once in
the Standby Power mode, the device waits to be selected, so that it can receive, decode and
execute instructions.
Table 5.
Figure 10. Read Identification (RDID) instruction sequence and data-out sequence
S
C
D
Q
Manufacturer Identification
Read Identification (RDID) data-out sequence
0
High Impedance
20h
1
2
Instruction
3
4
5
6
7
MSB
Manufacturer Identification
8
Figure
9 10 11 12 13 14 15
Memory Type
10.
20h
Device Identification
MSB
15 14 13
16 17 18
Device Identification
Memory Capacity
3
28 29 30 31
2
18h
1
Instructions
0
AI06809b
21/45