M25PE16-VMW6P Numonyx, B.V., M25PE16-VMW6P Datasheet - Page 31

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M25PE16-VMW6P

Manufacturer Part Number
M25PE16-VMW6P
Description
16-Mbit, page-erasable serial flash memory with byte-alterability, 75 MHz SPI bus, standard pinout
Manufacturer
Numonyx, B.V.
Datasheet
M25PE16
6.8
Read lock register (RDLR)
The device is first selected by driving Chip Select (S) Low. The instruction code for the read
lock register (RDLR) instruction is followed by a 3-byte address (A23-A0) pointing to any
location inside the concerned sector. Each address bit is latched-in during the rising edge of
Serial Clock (C). Then the value of the lock register is shifted out on serial data output (Q),
each bit being shifted out, at a maximum frequency f
(C).
The instruction sequence is shown in
The read lock register (RDLR) instruction is terminated by driving Chip Select (S) High at
any time during data output.
Any read lock register (RDLR) instruction, while an erase, program or write cycle is in
progress, is rejected without having any effects on the cycle that is in progress.
Table 9.
Figure 13. Read lock register (RDLR) instruction sequence
b7-b2
S
C
D
Q
Bit
b1
b0
Sector lock down
Sector write lock
0
Lock register out
and data-out sequence
Bit name
1
High Impedance
2
Instruction
3
4
5
Value
‘1’
‘0’
‘1’
‘0’
6
7
MSB
The write lock and lock down bits cannot be changed. Once a
‘1’ is written to the lock down bit it cannot be cleared to ‘0’,
except by a reset or power-up.
The write lock and lock down bits can be changed by writing
new values to them (default value).
Write, program and erase operations in this sector will not be
executed. The memory contents will not be changed.
Write, program and erase operations in this sector are
executed and will modify the sector contents (default value).
23
8
22 21
Figure
9 10
24-bit address
13.
Reserved
3
28 29 30 31 32 33 34 35
2
C
1
, during the falling edge of Serial Clock
0
MSB
Function
7
6
Lock register out
5
4
3
36 37 38
2
1
Instructions
0
39
AI10783
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